Investigation of the degradation of smooth SiGe epitaxial layer on Si substrate

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Abstract

The degradation of smooth SiGe epitaxial layer was investigated by transmission electron microscopy (TEM), X-ray reflectivity (XRR) and atomic force microscopy (AFM). It was shown from AFM results that the crosshatch was formed with increasing annealing temperature, which indicated the degradation of smooth surface. The surface degradation was caused by the internal dislocations, which were observed by plan-view TEM (PTEM) and cross-sectional TEM (XTEM). From XTEM, the sharp interface between SiGe top layer and Si substrate was broadened and there were a lot of 60° dislocations formed in SiGe top layer, which resulted in the crosshatch on the surface. The crosshatch was also verified by PTEM.

Introduction

High-mobility strained SiGe have attracted considerable attention for their potential applications in high-frequency devices [1], [2]. However, during SiGe processing, the smooth surface and abrupt interface were often destroyed, which will alter the interface properties and degrade the device performance [3]. How to determine or analyze the degradation of smooth surface and interface? One way is to measure the surface roughness of samples annealed under different conditions by atomic force microscopy (AFM) [4], [5]. But the broadening of interface between SiGe layer and Si substrate and the occurrence and penetration of dislocation in SiGe top layer cannot be directly observed by AFM, so in order to study the degradation of the smooth SiGe top layer, we should also try to observe the cross-sectional and plan-view morphologies of samples. In this article, we study the degradation of smooth SiGe epitaxial by the observation of surface, interface and internal film using transmission electron microscopy (TEM) as well as X-ray reflectivity (XRR) and AFM.

Section snippets

Experimental

The SiGe layers were deposited on Si substrate using CVD technique. In order to study the degradation, the samples were annealed under different conditions. To prepare appropriated foils for TEM observations, first, from the main sample (size 25×25 mm2) about 4×4 mm2 size samples are cut out for TEM sample preparation. Then clean 4×4 mm2 size two samples are pasted by the solution of araldite and hardener face to face (deposited layers). Two Si wafers (same size as two clean Si wafers) are used as

Results and discussion

The SiGe top layer thickness, and the substrate and top layer roughness of the samples were measured by XRR. Fig. 1 shows the measured XRR data for sample before annealing. From the simulation result, the roughness of the top layer was about 3 Å and the roughness of the interface of SiGe/Si was about 3 Å. The simulation was done by a commercial simulation software whose model for analysis is based on nonlinear least-squares method. This surface roughness was also confirmed by AFM observation. The

Conclusions

The degradation of smooth SiGe surface and abrupt interface between SiGe layer and Si substrate were investigated. The smooth SiGe surface turned rough for the formation of crosshatch on the surface. As the sharp interface was destroyed, there was no clear border between SiGe layer and Si substrate, and a lot of 60° dislocations were found in SiGe layer after annealing process.

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Cited by (2)

  • Influence of He implantation dose on strain relaxation of pseudomorphic SiGe/Si heterostructure

    2013, Thin Solid Films
    Citation Excerpt :

    Dislocations nucleation will occur at the interface during thermal annealing, forming misfit segments whose edges relieve the strain accumulated in the layer. The misfit dislocations glide and interact with each other, then MDs with the same Burgers vector bunch [22]. It is generally agreed the bunching of MDs is the origin of the crosshatch observed by AFM.

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