Integration of low dimensional crystalline Si into functional epitaxial oxides
Introduction
Efficient integration of low dimensional crystalline Si nanostructures into a dielectric matrix, such as functional oxides could pave the way for large number of novel nanoscale device applications ranging from nonvolatile memories to next generation solar cells. With immense fundamental interest in mind, such nanostructures could also set an example for studying various quantum phenomena in practical applications. As an example, Si quantum well with epitaxial Gd2O3 as barrier layers could be used for unconventional quantum-effect device applications based on tunneling effects. Epitaxial gadolinium oxide (Gd2O3) has also demonstrated a great potential for application as very thin high-K material replacing SiO2 in future MOS devices. In particular, an ultra-thin epitaxially grown Gd2O3 with CMOS-compatible FUSI NiSi gate electrode has been shown to meet ITRS targets for field effect transistors (FETs) for the near term schedule and beyond [1]. In this work we will show that the same epitaxial layer with embedded Si-quantum dots (Si-QD) can also be successfully used to realize novel devices such as nanocrystal memories, one of the promising candidates for future nonvolatile, high density, and low operating-voltage memory applications. Originally, this approach has been based on embedding single crystalline Si dots with few nanometers in size (Si-QD) into the insulating gate oxide of field effect transistor (FET), where Si-QDs could be used as deliberately generated trap centers for electrons and/or holes [2]. The entrapment of the charges (e.g. electrons) by these dots embedded in the gate oxide eventually shifts the threshold voltage during the device operation by screening the gate charges and hence reduces conduction in the channel inversion layer [2]. Electrical performance of these clusters strongly depends on their physical properties such as their size, density, and spatial distributions into the oxide as well.
Thus, the most challenging task to improve the device performance has been the formation of nanostructures with constant size, high density, and uniform distribution. There are several approaches reported recently to place Si-nanostructures into SiO2 and also high-K oxides [3], [4], [5]. Replacing SiO2 with high-K oxide in floating gate memories is advantageous since the larger capacitance enhances the drive current while high breakdown voltage and low leakage current could be maintained [6], [7] due to thicker physical thickness. Recently, we demonstrated the controlled growth of Si-QD incorporated into epitaxial rare-earth oxide using molecular beam epitaxy (MBE) technique [8]. Exploring the advantages of different thin film growth mechanisms, we could control the size and density of Si-QDs embedded in epitaxial Gd2O3 grown on Si substrates. The direct growth of QD allows better control over the size and the distance between the QD and substrate than any post-deposition formation. The epitaxial rare-earth oxide, if deposited by MBE, exhibits superior crystal quality and therefore allows better control over the scaling in future devices. In the first part of this paper, we will present various structural and electrical investigations of Si-QDs embedded in epitaxial Gd2O3. Later we will present Si-quantum wells (Si-QW) with epi-Gd2O3 barrier layers for various nanoelectronic devices based on tunneling effects.
Section snippets
Experimental
Gd2O3/Si/Gd2O3 stacks were fabricated on n- and p-type Si(1 1 1) and Si(0 0 1) substrates using solid source MBE technique. Silicon and granular stoichiometric Gd2O3 were evaporated by electron-beam heating with rates of 0.03–0.01 nm/s. The epitaxial Gd2O3 layer was grown at 675 °C on specially prepared silicon surfaces under an oxygen partial pressure of 5×10−7 mbar as described in Ref. [9]. Subsequently, Si was deposited on epi-Gd2O3 surface. However, this cannot be achieved straightforward because
Growth of Si-QD and QW on Si
As mentioned above, the temperature during Si deposition is the key parameter to obtain QD or quantum well structures. For Si-QD formation, the substrate temperature was varied between 400 and 650 °C. The size and density of the dots were controlled by changing the substrate temperature, deposition rate and time. We found that optimum dot density could be obtained by Si deposition at 600 °C. Finally, a Gd2O3 control layer was deposited on the Gd2O3 surface covered with Si clusters at 675 °C, using
Conclusions
In summary, the growth of Gd2O3/Si/Gd2O3 nanostructures on Si substrates using MBE was investigated. The fabrication of single-crystalline nanostructures with ultra-thin single crystalline Si buried in a crystalline oxide with sharp interfaces is demonstrated. The growth process is based on modified solid-state MBE techniques. The electrical investigations carried out on the metal–oxide–semiconductor (MOS) structure comprised with Si-QD demonstrate that such structure could be potential
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Theoretical framework for performance evaluation of silicon quantum dot solar cell under low concentration illumination
2016, Superlattices and MicrostructuresCitation Excerpt :Under similar conditions, the addition of 25 QD layers on top of the c-Si solar cell with fQD equal to ∼4 × 1012 cm−2 in each layer leading to the effect of quantum confinement, the quantum efficiency curve shows spikes of e-h pair generation corresponding to the mini-bands of energy confined in three dimensions. The order of calculated fQD (on the basis of fQD = Lz × A/V) is in agreement with the experimental number density of QD in Si solar cell as reported in literature [43,79,80]. The extended area under the curve due to presence of QD adds up more e-h pair in the photo-generated current density of the solar cell.
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