Elsevier

Microelectronics Journal

Volume 44, Issue 10, October 2013, Pages 920-929
Microelectronics Journal

Design of micropower class AB transconductors: A systematic approach

https://doi.org/10.1016/j.mejo.2012.11.003Get rights and content

Abstract

A systematic design approach to achieve micropower class AB CMOS transconductors is presented. It includes techniques to get rail-to-rail operation and continuous transconductance tuning, based on floating and Quasi-Floating Gate transistors. Application of the proposed design approach leads to a new family of high-performance power-efficient class AB CMOS transconductors. To illustrate the feasibility of this approach, 12 transconductors derived from this common framework have been designed and fabricated in a 0.5 μm CMOS technology. Measurement results show THD values for 2 V inputs of −56 dB for a static power of 300 μW and silicon area <0.07 mm2.

Introduction

Linear operational transcondance amplifiers, or transconductors, are widely used in several applications such as continuous-time filters, A/D and D/A converters, variable-gain amplifiers (VGAs), and sensor interfaces, to name a few [1]. Design of high-performance CMOS transconductors is challenging nowadays due to the limited signal swing available under the reduced supply voltages imposed by technology downscaling and low power requirements. Usually the applications mentioned demand the availability of transconductors featuring high linearity in a wide input range under the aforementioned low supply voltage requirements.

Several techniques have been proposed to improve linearity of transconductors, such as adaptive biasing or nonlinearity cancellation, but they often require generating extra currents thus increasing the area and power requirements, and/or rely on the MOS square law which is unrealistic in modern processes [1]. A very interesting alternative is the use of resistive degeneration by passive resistors for voltage-to-current (V–I) conversion. Unfortunately, continuous tuning of the resistance value is not possible in this case. The use of MOS transistors in triode region instead to implement the resistance element allows continuous tuning but degrades linearity noticeably. Besides, class AB operation is required in the transconductor to allow maximum dynamic currents beyond the bias current values, overcoming the tradeoff between static power consumption and dynamic performance of class A implementations. However, class AB transconductors usually require additional circuits to achieve class AB operation which often increase power consumption, noise level and supply voltage requirements, and decrease current efficiency. Besides, quiescent currents are sometimes not well controlled in the resulting class AB circuits.

In this paper it is shown that Quasi-Floating Gate and Floating-Gate techniques can be an interesting approach to overcome these drawbacks. Floating-gate [2], [3], [4], [5], [6], [7], [8], [9], [10] and Quasi-Floating Gate [11], [12], [13] techniques have found widespread use in analog design. Among other applications, they allow achievement of a weighted addition of input voltages in a simple and compact way. They also allow the efficient implementation of floating dc level shifters that can be used for instance to design class AB output stages.

The paper is organized as follows: Section 2 provides a brief overview of Floating-Gate (FG) and Quasi-Floating Gate (QFG) MOS transistors. Section 3 deals with the application of these techniques to achieve rail-to-rail input range, transconductance tuning, and class AB operation. A systematic approach to design class AB CMOS transconductors based on these techniques is presented in Section 4. Second-order effects and noise are analyzed in Section 5 and Appendix A. Measurement results of 12 transconductors thus generated are presented in Section 6. Conclusions are drawn in Section 7.

Section snippets

Floating and Quasi-Floating Gate MOSFETs

In this section the basic devices that will be employed in the proposed transconductors are briefly reviewed.

Application of FGMOS and QFGMOS techniques to CMOS transconductor design

This section illustrates how FGMOS and QFGMOS devices can be employed to achieve relevant features in CMOS transconductors in a simple way.

Design of class AB transconductors: a systematic approach

In this section, a new family of class AB transconductors will be described based on the use of class AB second-generation current conveyors (CCIIs) [16]. These devices are employed as basic building blocks in many current-mode circuits. They are three-port structures (their ports are traditionally named X, Y and Z) where VX=VY, IY=0 and IZ=±IX. Variables IX, IY, IZ and VX, VY, VZ are currents and voltages at ports X, Y and Z, respectively. When the signs of IZ and IY are the same or different,

Second-order effects and noise

Geometric and parametric mismatch, as well as temperature and supply voltage variations, may occur in practice and robust design must consider them. As mentioned above, the class AB operation presented, based on QFG techniques, allows well controlled quiescent currents regardless of supply or temperature variations. This is because quiescent currents are set by current mirroring, so provided that bias current IB in Fig. 5 is independent of these variations quiescent currents are too. However

Measurement results

The chip containing the 12 transconductors was fabricated in a 0.5 μm double-poly n-well CMOS technology with nominal NMOS and PMOS threshold voltages of 0.67 V and −0.96 V, respectively. A microphotograph is shown in Fig. 9. Table 1 summarizes the measurement conditions and the main results obtained. Linearity is evaluated for large signal levels, which generate signal currents much larger than the quiescent currents. Despite this fact, that would avoid operation of a conventional class A

Conclusion

A systematic approach to design class AB transconductors has been presented. Using it, a new family of transconductors can be generated by properly choosing the topology and the implementation of the CCIIs and resistors. For illustration 12 realizations have been designed and fabricated. Measurement results confirm the good linearity achieved while preserving micropower quiescent consumption.

Acknowledgment

This work has been supported in part by the Spanish Direccion General de Investigacion and FEDER under Grant TEC2010-21563-C02/MIC.

References (24)

  • E. Sanchez-Sinencio et al.

    CMOS transconductance amplifiers, architectures and active filters: a tutorial

    IEE Proc. Circuits Devices Syst.

    (2000)
  • B.W. Lee et al.

    Analog floating gate-synapses for general purpose VLSI neural computation

    IEEE Trans. Circuits Syst.

    (1991)
  • T. Shibata et al.

    A functional MOS transistor featuring gate level weighted sum and threshold operations

    IEEE Trans. Electron Devices

    (1992)
  • J. Ramirez-Angulo et al.

    Low supply voltage OTA architectures using multiple input floating gate transistors

    IEEE Trans. Circuits Syst. II

    (1995)
  • J. Ramirez-Angulo et al.

    Low-voltage circuits building blocks using multiple-input floating-gate transistors

    IEEE Trans. Circuits Syst. I

    (1995)
  • L.S.Y. Wong et al.

    1-V CMOS D/A converter with a multi-input floating-gate MOSFET

    IEEE J. Solid-State Circuits

    (1999)
  • J. Ramírez-Angulo et al.

    MITE circuits: the continuous-time counterpart to switched-capacitor circuits

    IEEE Trans. Circuits Syst. II

    (2001)
  • E.O. Rodríguez-Villegas et al.

    Solution to trapped charge in FGMOS transistors

    Electron. Lett.

    (2003)
  • A.J. Lopez-Martin et al.

    CMOS transconductors with continuous tuning using FGMOS balanced output current scaling

    IEEE J. Solid-State Circuits

    (2008)
  • J.M. Algueta Miguel, A.J. Lopez-Martin, J. Ramirez-Angulo, R.G. Carvajal, Tunable rail-to-rail FGMOS transconductor,...
  • J. Ramirez-Angulo et al.

    Very low voltage analog signal processing based on quasi floating gate transistors

    IEEE J. Solid State Circuits

    (2004)
  • J. Ramirez-Angulo et al.

    A free but efficient class AB two-stage operational amplifier

    IEEE Trans. Circuits Syst. II

    (2006)
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