Analytical approach of a nanoscale triple-material surrounding gate (TMSG) MOSFETs for reduced short-channel effects

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Abstract

A 2D analytical model for the triple material surrounding gate MOSFET (TMSG) is developed by solving the Poisson equation. In this structure, we use three gate materials of different work functions. The model includes analytical modeling of parameters like surface potential, Electric field distribution and threshold voltage using parabolic approximation method. The short channel effects in this structure are suppressed because of the perceivable step in the surface potential profile, which screens the drain potential. The small difference of voltage due to different gate material keeps uniform electric field along the channel, which in turn improves the carrier transport efficiency. Hence the reduction of short channel effects (SCEs) are studied by modeling the device. The results of the analytical model are compared with the MEDICI simulation results and it is well validated.

Introduction

In order to achieve high-speed and high packing density of the logic circuits and memories, the MOSFET dimensions in CMOS technology, have been reduced continuously for quite some time now. With the shrinkage of its dimensions, the devices have achieved cutoff frequencies in the giga-hertz range making this technology also very attractive for analog and mixed signal system on-chip applications. However, scaling of devices leads to short channel effects such as degradation of device reliability due to gate leakage current (hot-electron effects) and drain-induced barrier lowering (DIBL). These SCEs need to be eliminated or minimized for proper device operation [1].

The main reason for short channel effects is the drain control and the technique is to make the step-function like shaping of the surface potential since it screens the effect of drain on the source-channel barrier of the device [2]. The step rise of the surface potential profile can be generated by using more than one material with the different work functions for forming the gate contact of a MOSFET. This technique has been implemented in the conventional silicon-on-insulator MOSFETs and multigate MOSFETs and significant improvements have been observed in terms of SCEs and hot carrier effects. MOSFET devices with different gate structures has been proposed in the literature such as double gate, triple gate, quadruple, Ω-gate, Π-gate, surround gate MOS transistors.

To overcome the scaling limitations on the planar MOSFETs, the surrounding gate MOSFET was proposed [2], [3], [4], [5], [6], [7],[14], [15], [16], [17] as it offers high packing density as compared to the traditional planar MOSFETs. SGTs also show improved gate controllability and short channel immunity as the gate surrounds the silicon pillar completely and therefore, gains an increased control over the channel. To enhance the immunity against short channel effects, a new structure incorporating the advantages of triple material gate and surrounding gate MOSFETs called Triple material surrounding gate is proposed. This enables a minimization of the ability of the localized charges to raise drain resistance and more control of gate over the conductance of the channel so as to increase the gate transport efficiency.

The structure consists of gate electrode comprising of three different materials with different work functions. The material work functions will be selected in such a way that the work function of the near the source is highest and that near the drain is lowest in the MOSFET [8]. The high work function near the source leads to more rapid acceleration of carriers in the channel and the low work function near the drain leads to reduction of electric field peak at the drain side and reduces hot carrier effect.

Section snippets

Device structure

Fig. 1 shows the schematic structure of the triple material surrounding gate MOSFET [8]. In this structure, the gate electrode consists of three materials M1, M2 and M3 of different work functions deposited over respective lengths L1, L2 and L3 on the gate oxide layers. The gate materials are chosen in such a way that ϕM1>ϕM2>ϕM3 and L=L1+L2+L3. The gate material at the source end is with the highest work function [9] called the control gate. The middle material with the intermediate work

Mathematical modeling

There are many methods to model the device analytically and to calculate the surface potential, electric field and threshold voltage. It includes superposition method [8], Green function method, parabolic approximation method, Fourier series expansion method [12], [13] and numerical methods. H.K.Wang et al. [8] have reported a model for the 2-D potential distribution of TMSG MOSFETs by using the superposition technique. Despite accuracy of the above model, it involves a lot of mathematical

Results and discussions

The analytical model results are compared with MEDICI simulation results [8]. Fig. 2 shows the calculated surface potential profile of TMSG. The gate-oxide thickness and the diameter of the silicon pillar are tox=2 nm and 2R=40 nm, respectively. The other specifications considered for simulation are: L1+L2+L3=1:1:1, L=90 nm, Vgs=0.1 V, NA=1016, Vds=0.5 v. The surface potential of (DMSG) Dual material surrounding gate shows one step up function whereas the triple material (TMSG) show two step up

Conclusion

The triple material surrounding gate TMSG MOSFET is examined through a simple analytical model and the results have been compared with MEDICI simulation. The analysis of electrical characteristics—surface potential, electric field and threshold voltage is performed. The results unambiguously establish that the incorporation of TMSG structure in a MOSFET leads to subdued short-channel effects due to a step-function in the surface potential profile. The results also demonstrate the excellent

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