A CMOS power amplifier using an active balun as a driver stage to enhance its gain
Introduction
Power amplifiers have many applications because of their essential functions in wireless communication systems. In particular, even though CMOS devices have low breakdown voltage, lossy substrate, and low linearity characteristics, power amplifiers that use CMOS technology have become increasingly popular, due to their low unit cost and easy integration with other circuit blocks, such as the supply modulators used with envelope-tracking (ET) techniques [1], [2], [3], [4], [5], [6], [7], [8]. Nonetheless, CMOS technology still presents various obstacles to the design of RF power amplifiers, and this has prevented CMOS power amplifiers from becoming superior to HBT power amplifiers. For example, given that there is no through-via hole in the CMOS process, a gain-reduction problem arises due to the parasitic inductance of the bonder-wires. Gain-reduction problems must be solved by adapting a differential structure to generate a virtual ground (GND) node in the CMOS circuits.
Accordingly, for the differential operation of CMOS power amplifiers with single-ended input and output, it is essential to have input and output transformers that can act as baluns. In general, input and output transformers are designed using passive elements; these elements are associated with undesired power losses induced by the lossy silicon substrates used. Fortunately, by adapting a distributed active transformer (DAT) in the output-matching network of the power amplifiers, the loss induced by the output transformer can be successfully minimized [9], [10], [11], [12]. However, there is still limited knowledge of efficient techniques which can be used to minimize losses in the input transformer. Because such losses can directly degrade the overall gain of the power amplifier, the power consumption in the driver stage needs to be increased as a compensating factor.
When a power amplifier is integrated with a modulator block to provide a single-chip solution, the input balun can be removed, and the differential output of the modulator can be used instead, as shown in Fig. 1(a). However, the majority of commercial power amplifiers are not integrated with a modulator that can suppress undesired coupling from the high output power of the power amplifier to other RF circuits. Given that the modulator output and the inputs of the duplexer and switch are generally composed of single-ended circuits, as shown in Fig. 1(b), the input and output baluns of a differential CMOS power amplifier are essential.
To solve the gain reduction problems of the passive input balun, an active balun may serve as a solution. However, although research related to active baluns for small-signal circuits is popular, there are few works related to active baluns for power amplifiers [13], [14], [15], [16], [17].
In this work, we propose a differential CMOS power amplifier with an active balun as a driver stage to enhance the gain of the power amplifier. Since the lossy input transformer can be removed by using the balun embedded driver stage, the gain of the proposed power amplifier can be improved without the cost of additional power consumption, and the efficiency of the power amplifier is consequently improved. Although there have been studies about power amplifiers with active baluns, the active balun has not been investigated in relation to the linearity of the modulated input signals. In this work, to obtain enough linearity for the modulated signal, the magnitude difference and phase error between differential signals at the output nodes of the active balun were investigated. The mismatches between the differential signals were minimized by optimizing the biases of the active balun. To verify the feasibility of the proposed power amplifier structure, we designed a 2.0 GHz CMOS power amplifier using the 110-nm RF CMOS process. Additionally, the chip size was reduced because the bulky passive input transformer was removed.
Section snippets
Motivation: active balun for a CMOS power amplifier
In this work, the motivation to develop an active balun for application in a differential CMOS power amplifier was to enhance the gain, reduce the chip size, and widen the bandwidth of the CMOS power amplifier.
Design of a power amplifier with an active balun
In Fig. 6(a), a simple schematic of the proposed power amplifier with an active balun is shown. We also designed a typical power amplifier with a passive input balun, as shown in Fig. 6(b), so that the performances of the two power amplifiers could be compared, and thereby to prove the feasibility of the proposed power amplifier.
The transistor size is presented in Table 1. The power stage of the proposed power amplifier is identical to that of the typical power amplifier. Given that a passive
Measured results
Fig. 10 shows a chip photograph of the designed power amplifier with the active balun fabricated using the 110-nm RF CMOS process, which provides eight metal layers. All of the matching networks, including the inductor, output transformer, and test pads, are fully integrated. The supply voltages of the power and driver stages are 3.3 V, suitable for mobile applications. The supply voltage enters through a virtual ground of the output transformer and a center-tap of the inductor. The input and
Conclusion
In this study, we designed a CMOS power amplifier with an active balun to improve its gain and efficiency and to minimize the chip size. The designed active balun acts as the driver stage of the power amplifier as well as the input balun. Given that the loss induced by the passive transformer is removed in the proposed power amplifier, the gain of the power amplifier is improved. Additionally, by removing the bulky input transformer, the chip size of the proposed power amplifier is reduced
Acknowledgments
The authors would like to thank Dae Yeon Kim and Hangjong Kim, both with Dongbu HiTek Co., Ltd., Seoul, Korea, for the helpful advice and discussions, and for their help with the fabrication of the chip. This work was supported by the Industrial Strategic Technology Development Program (No. 10053023), funded by the Korea government Ministry of Trade, Industry and Energy.
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