Heterogeneity of abstractions in EDA tools: Reviewing models of computation for many-core systems targeting intensive signal processing applications

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Abstract

Designing many-core systems for intensive signal processing applications necessitates refreshing common practices in the design of Electronic Design Automation (EDA) tools. This should change the focus of the EDA community from old-fashioned foundations including heavy implementations and time-consuming simulations, to recent engineering practices promoting rapid design and acceptable accuracy. Hence, the challenge of the EDA community comes to define a design process for many-core systems which enables four goals: modeling conciseness, estimation accuracy, design rapidity, and exploration flexibility. In this scenario, the modeling task can be defined as a delicate design phase that requires choosing the adequate Model of Computation (MoC) at each step of the design process. Design models at each level of abstraction provide the basis for applying analysis, synthesis or verification techniques. Since modeling concepts and techniques can have a large influence on the quality, accuracy and rapidity of results, models and corresponding abstraction levels should be well-defined with clear and unambiguous semantics. In this paper, we aim to provide an analysis and comparative overview of common MoCs used in the specification and performance analysis of intensive signal processing applications and many-core architectures. After identifying conventional classifications, we propose a new taxonomy of MoCs based on their purpose in the design flow. The heterogeneity of MoCs in EDA tools is also discussed and various tools are reviewed and compared.

Introduction

At the beginning of this new century, the exponential information growth rate goes beyond Moores Law evolution [1]. Accordingly, massive data including signals is making big pressure on the digital signal processing field leading to the emergence of a new discipline: intensive signal processing. In 2012, authors in [2] listed big data techniques involving intensive signal processing discipline in Top 10 Critical Technology Trends For The Next Five Years. Intensive signal processing denotes the manipulation of a considerable amount of data and the accomplishment of numerous complex computations [3]. An intensive signal processing application is then an application that explores, inquires, examines, pictures and in general deals with very large scale data streams.

Intensive signal processing applications share many common characteristics which are mainly: the high complexity of the data structures, the intensive parallelism available in the application functionalities, and the high data storage and computational requirements. Targeting intensive signal processing applications requires using hardware architectures that are:

  • Fast: meet demanding processing requirements

  • Flexible: easy to program to reach the market on time

  • Scalable: easy to upgrade with the intention of providing a different functionality

The needs for time-predictability, energy-efficiency, and flexibility, coming along with Moore’s law greedy demand for performance and the advancements in the semiconductor scalability, have progressively paved the way for the introduction of many-core systems in intensive signal processing domain.

Because electronic circuit design is a less tolerant mean of design, designers of many-core systems targeting intensive signal processing applications need more powerful tools to deal with long design cycles and hard constraints. For this reason, system engineers, logic designers and layout designers use Electronic Design Automation (EDA) tools to facilitate and automate the design process of integrated circuits. A design process can be seen as a set of design steps that assist the designer in developing feasible embedded designs while balancing production costs with development cost and time. Each design step, including specification, validation, evaluation, and decision making, is associated with guidelines. An important guideline concerns principally the choice of the adequate Model of Computation (MoC) at each step of the design process. Improving EDA tool’s rapidity, flexibility, and reusability comes to automate the design process while finding the best combination of MoCs. For this reason, different models are needed at different steps in the design process.

In this paper we aim to provide a comparative overview of the state-of-the-art current directions in modeling many-core systems and intensive signal processing applications at various levels of abstraction. After defining and identifying common classifications of MoCs based on our observations, we propose a new classification in Section 2. Based on this classification, we discuss the heterogeneity issue in Section 3 and define it as a major demand on a specification methodology in EDA tools. MoCs for the specification and performance analysis of intensive signal processing applications and many-core architectures are discussed and compared in Sections 4 and 5. To provide a more complete overview, we discuss the heterogeneity issue in more than twenty related academic EDA tools in Section 6. Finally, this paper concludes with a conclusion in Section 7.

Authors in [4], [5] presented a taxonomy of the most widespread tools and languages in the context of smart systems based on the abstraction level and the domain criteria. While these studies are restricted to review system-level simulation of analogue and digital smart systems, this paper presents a deeper study of more than fifteen MoCs and more than twenty DSE tools in the context of many-core embedded systems targeting intensive signal processing applications. In addition, the proposed review studies multi-purpose MoCs and tools in contrary to [4], [5], which are mainly concentrated on MoCs and tools for simulation and co-simulation purposes.

Section snippets

Models of computation for embedded systems : Definition and conventional classifications

A language is traditionally seen as consisting of three parts: symbols, syntax, and semantics [6]. Rules that define the combination of symbols in a correctly structured fragment are called syntax. Rules for interpreting combinations of symbols are semantics. Actually, a given language incorporates different semantic components including:

  • Time semantics: continuous, discrete, periodic, etc.

  • Applicability semantics: software-oriented, hardware-oriented, design-oriented, etc.

  • Flow nature semantics:

Heterogeneity of abstraction: Models of specification and models of performance

Embedded system design requires the use of models that capture a system at varying levels of abstraction. A model serves two different purposes [25]: specification and implementation. The specification purpose aims at describing a given system in a purely functional and easy way that captures the system functionality without implying heavy details. The implementation purpose aims at giving sufficient details to realize the system.

Given that the specification and the implementation purposes

MoCs for intensive signal processing applications

The suitability of a given model of specification is subject to the characteristics of the application domain and to the design level.

In our application domain, intensive signal processing, there is little need for modeling control flows as the computations are systematic. Consequently, the model should be data flow oriented. In addition, instead of focusing on concrete representation of time, expressing precedence relations between tasks of the application is the most important when tackling

Application model of performance

Previously, we have mentioned SDF and its extensions as restricted models of specification. However, these restrictions guarantee formal properties permitting to efficiently deal with the static scheduling problem.

As explained previously, SDF is the most known dataflow-based MoC providing analyzability for deciding deadlock protection and other properties, such as throughput [56] and resource requirements (memory usage) [57]. Other dataflow models were introduced as extensions to the SDF MoC

Heterogeneity of abstraction in EDA tools for intensive signal processing applications

Being a central activity of embedded systems performance analysis, DSE should consider the criticality of many-core design challenges and facilitate finding an efficient solution given the design constraints and optimization goals. DSE has become a high and active research field and several research activities in this field have leaded to a variety of DSE tools.

Performance analysis involves three issues which are the designers modeling effort, the evaluation effort, and the results accuracy (

Summary and conclusion

Being a central design activity of embedded systems design, DSE should consider the criticality of many-core design challenges and facilitate finding an efficient solution given the design constraints and optimization goals. An important element should be used for enhancing, speed, accuracy and flexibility of the DSE of many-core systems: an abstraction pyramid (Fig. 2) that reinforces the heterogeneity of models at the specification and the design space exploration phases. We believe that the

Manel Ammar received her Ph.D. in Computer Science from the National Engineering School of Sfax, Tunisia in 2016. She received the Engineering degree and the M.S. degree in new technologies of computer dedicated systems from the National Engineering School of Sfax, Tunisia in 2010 and 2012, respectively. Her research interests include high level design space exploration, model-driven engineering, embedded systems design, multi-processor scheduling theory, and many-cores/multi-processors

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  • Cited by (1)

    Manel Ammar received her Ph.D. in Computer Science from the National Engineering School of Sfax, Tunisia in 2016. She received the Engineering degree and the M.S. degree in new technologies of computer dedicated systems from the National Engineering School of Sfax, Tunisia in 2010 and 2012, respectively. Her research interests include high level design space exploration, model-driven engineering, embedded systems design, multi-processor scheduling theory, and many-cores/multi-processors architectures.

    Mohamed Abid completed engineer’s degree in electronics in 1982, master’s in electronics from Faculty of Sciences of Sfax in Tunisia in 1985 and PhD from the National Institute of Applied Sciences in France in 1989 in the area of Computer Engineering & Microelectronics. Actually, he is a professor in the Computer Science Department and the head of the Computer and Embedded System laboratory in National School of Engineers of Sfax in Tunisia.

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