Research Note
Percolative approach for failure time prediction of thin film interconnects under high current stress

https://doi.org/10.1016/j.microrel.2004.09.009Get rights and content

Abstract

The present study deals with the use of a rapid and non-destructive technique based on percolation theory to predict failure times during the reliability analysis of thin film interconnects under high current stress. Al–Cu test structures were used for this purpose. Small populations of these structures of similar geometry were subjected to extremely high current density conditions (30.6 and 46.6 MA/cm2) and their corresponding failure times were noted. The critical exponentB) for the Al–Cu structures stressed at both the current densities was calculated to be 0.16. The value of the μB showed that the structures undergo biased percolation and have similar failure mechanisms (due to Joule heating) at both current densities. The calculated value of μB was used to predict the failure times of the fuses under each of the current stresses. The discrepancy between the experimental failure time and the predicted failure time was significantly low (<12%) in both cases thus expressing the strength of this prediction technique.

Introduction

The constant miniaturization of device size in integrated circuits (ICs) has resulted in their being subjected to extremely high current density conditions leading to their early failure as well as other reliability related issues. Reliability of the thin film metallization in interconnects is of importance in IC technology thus leading to the search for a rapid, accurate, and cost efficient failure time prediction technique. However, most of the methodologies being used currently in the reliability study of thin film interconnects are destructive [1]. These techniques involve subjecting a representative group of randomly selected samples to an overstressed condition of either constant current or voltage until failure occurs [2]. Since failure under normal device operation conditions takes a long time to occur, the samples are therefore subjected to accelerated testing conditions of higher temperature and current density [2]. The failure times detected for the samples are then analyzed using a suitable statistical distribution to determine the various factors and distribution parameters (viz. activation energy and current density exponent) leading to failure which are then extrapolated to predict reliability of the interconnects under normal operating conditions [1], [2]. However, the main disadvantage involved with these techniques is that as the number of samples to be destroyed is only a small fraction of entire population; it can produce significant uncertainty in the definition of distribution parameters [3], [4]. Moreover extrapolation of accelerated test data leads to inflation of the statistical errors involved which need to be minimized [2]. Also, sample to sample variations in testing conditions would lead to introduction of errors which would then cause improper interpretation of test data [2]. These methodologies also involve more cost in destroying a portion of the samples and also take a long time for test purposes. So the best methodology for prediction of failure time is by adapting non-destructive techniques. However, the main requirements of such a prediction technique are that it should be rapid, accurate, and reliable. In the past, percolation theory has been successfully used to study the failure in disordered materials [5]. Studies have also been conducted for the use of biased percolation model for understanding the failure of electrical devices [1], [5], [6], [7]. If failure occurs by standard percolation then the damage would be more uniform and dependent on a single test parameter as is observed in the case of agglomeration of Ag metallization [8]. However, in case of biased percolation, failure occurs by the formation of defect channels perpendicular to the direction of current flow as is observed in the case of electromigration induced failure mechanisms [1], [4]. Biased percolation model has been used in the above mentioned studies because it has been assumed that the failure of the devices occurs due to generation of Joule heating induced defects [5]. These studies are based on the assumption that the thin film under study is in the form of two-dimensional square lattice network of resistors having equal initial resistances, deposited on an insulating substrate at a constant temperature, and contacted on either sides for application of a constant external current or voltage [1], [7]. A failure of such a network of resistors occurs by the formation of a continuous path of defects between the two contacts; this leads to an increase in overall resistance of the network [7]. At this point the network can be treated as a mixture of conductors and insulators. Hence, based on percolation theory the resulting overall resistance of a large two-dimensional random resistor network (RRN) can be represented as [1], [9]:Rρ-ρc-μwhere ρ is the fraction of broken resistors, ρc is the percolation threshold, and μ is a dimensionless statistical parameter known as conductivity critical exponent that describes the status of the biasing in a system [9].

Pennetta et al. [1] have proposed the theoretical aspects of such a technique based on percolative models and scaling relations for prediction of failure time of thin film interconnects [1], [9], [10]. For unbiased or standard percolation μ has a constant value of 1.299, but for biased percolation the value is not constant and depends on the degradation environment [9]. Since monitoring the fraction of defects on a large network is not feasible under normal and routine tests, thus Eq. (1) cannot be used for practical purposes of reliability analysis [1]. In order to overcome this difficulty, Pennetta et al. [1], [7] have suggested the use of the scaling approach in which resistance is related directly with time [1]:R(t)t-tf-μHere tf is the failure time. Interestingly, the critical exponent μ in Eq. (2) is the same as it is in Eq. (1). The value of μ for biased percolation was determined to be 0.26 under constant current conditions and 0.57 under constant voltage conditions [7].

In the present article we use Al–Cu single line fuses to experimentally show that the biased percolation theory and scaling relations can be used as a rapid, non-destructive, and cost efficient technique for prediction of lifetime of thin film interconnects.

Section snippets

Experimental details

Single line test structures of pure Al–Cu metallizations were used in the present study. The test structures were fabricated by a three metal standard 0.5 μm CMOS process. These structures consisted of two contact pads connected by a thin top metal line that acts as a fuse. The length and the width of the fuse were 11.6 μm and 1.4 μm, respectively and the total thickness of the Al–Cu top metal was 980 nm. Fig. 1 depicts an optical micrograph of the as fabricated test structure.

The fabricated fuses

Results and discussion

In this study a small population of Al–Cu fuse structures are subjected to high current conditions until failure occurs by open circuit. Fig. 3, Fig. 4 are the typical plots of current as a function of time obtained for the Al–Cu fuse structures in series with the 5 Ω and 10 Ω resistors, respectively. As has been mentioned earlier, the resistors control the magnitude of current flow through the test structures. The plots indicate that the current density flowing through the structures in case of

Conclusions

In this paper, we have used biased percolation theory and scaling models to predict the failure time of Al–Cu structures of similar geometry and materials characteristics when subjected to extremely high current density (30.6 and 46.6 MA/cm2). The salient features of this technique are that it is a rapid, non-destructive, and a less expensive methodology that can be adapted for assessing the reliability of thin film interconnects used for specific high current fuse applications. Most of the

Acknowledgments

This work is supported by a grant from Philips Semiconductors Inc., Standard Analog, Tempe, AZ 85284, USA. The authors are grateful to E. Joseph of Philips Semiconductors Inc. for their support towards this project.

References (11)

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