Progressive breakdown in ultrathin SiON dielectrics and its effect on transistor performance
Introduction
In the scaling of MOSFETS the gate dielectric plays a critical role, and an extensive range of papers exist on the subject of estimating the lifetime and integrity of these layers as they become thinner and are subjected to ever increasing current densities and electric fields [1], [2], [3].
SiON is largely replacing SiO2 as the dielectric layer in scaled MOSFET devices, as the struggle to implement alternative high-k dielectrics continues [4]. The majority of literature on the topic of dielectric breakdown is based on the behaviour of the devices in capacitor test structures. In the past this has been an effective way of studying them, as a breakdown suffered in a thick-dielectric, large area capacitor essentially destroys the layer’s insulating properties. This breakdown results in the current instantaneously rises by 10’s of milliamps in some cases.
It is clear that a transistor could not continue to function after having undergone a gate oxide failure like this, as when a gate voltage is applied, most carriers are lost to the gate and so the formation of a conductive channel between source and drain would prove impossible.
However more recently, as reported by Monsieur [5], experimental measurements on ultrathin oxides are made at stress conditions where breakdown shows a progressive nature, and the current at breakdown rises more slowly. This gives rise to the idea that if the current increases slowly after breakdown at stress fields of typically 20 MV/cm then it may rise much more slowly at operating fields (6 MV/cm) and devices could continue to function, despite having suffered an oxide breakdown.
We have carried out breakdown measurements and analysed the post-breakdown characteristics of capacitor devices and continued the analysis to observe the effects of breakdown on real transistor devices. This work demonstrates the ability of some transistors to function as switches even after they have undergone breakdown.
Section snippets
Devices and experiments
The devices used for these experiments were square gated capacitors with polysilicon gates and an area of 10−8 cm2, and transistors with a gate width of 10 μm and channel lengths varying from 0.13 to 0.25 μm. They were grown on test wafers used for evaluating a 65 nm CMOS process at IMEC. The structures had SiON dielectrics grown in three steps: First a base of SiO2 was grown (0.7–1.2 nm), and then nitrogen was incorporated using pulsed RF decoupled plasma nitridation (DPN) (10 mTorr, 20% duty cycle,
Post-breakdown transistor operation
To evaluate the functionality of nMOSFETS after gate oxide breakdown, transistors of various channel lengths were studied. The transistors were fabricated on the same wafers as the capacitors discussed in the previous section. The devices had channel lengths between 0.11 and 0.25 μm and widths from 0.4 to 10 μm. Shorter channel lengths down to 0.07 μm were investigated but were found to suffer from short channel effects, with the off–state and on–state currents almost equal, independent of gate
Conclusion
We have studied the growth of gate current after a gate oxide breakdown in terms of the growth of the current flowing in the path to 100 μA, and investigated the factors that accelerate the growth of a breakdown path. We have found that the same factors that accelerate breakdown are responsible, i.e. temperature, and gate voltage.
However, on studying the pre- and post-breakdown operation of a variety of transistors with different areas, we found that in large area devices progressive breakdown
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