Reservoir effect in SiCN capped copper/SiO2 interconnects

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Abstract

By analyzing electromigration in large lines, the reservoir effect due to via connecting matrices has been studied evidencing the key role of the (via + via inter-space) area parameter to gain lifetime. This extra-lifetime can be converted into effective current density increase, useful for circuits very demanding in current, depending on metal level. The understanding of the reservoir effect finally allowed the comparison of electromigration performance of lines of different width. It pointed out that the lifetime decreases with increasing line width, which evidences the copper diffusion at grain boundaries as mechanism.

Introduction

Circuits generally use a variety of interconnect line widths, which obviously depend on the interconnect role in all the circuit parts. Hence, it has been found necessary to study more deeply the electromigration phenomenon in wide lines, carrying large currents, altogether with their via area connecting matrices. Taking into account the electromigration void formation mechanism and the via area connecting the surrounding lines, the intrinsic electromigration robustness of various lines has been studied. In addition, a study on via size and inter-space allowed defining the best electromigration performance-matrix scenario for a given type of copper/SiO2 interconnect capped with SiCN as a block. It underlined the famous copper reservoir effect [1] already studied on aluminium-based interconnects [2]. Finally, this study allowed the understanding of electromigration performance depending on the line width and it also led to define more clearly the associated copper diffusion mode in each of the tested lines comparatively to other authors’ observations.

Section snippets

Experimental procedure

Dual damascene copper lines corresponding to the thick metal layers of a 90 nm node technology were used for this study. Copper is electro-chemically deposited on a PVD deposited TaN/Ta diffusion barrier. After a hot plate anneal, they are capped by a PECVD SiO2 layer. These lines are targeted to 0.9 μm-thick, 800 μm long and ended by vias, the size of which can vary between 0.36 μm up to 3 μm. The current leads are large enough to not suffer any electromigration during the stress. Fig. 1 summarizes

Results

Before any electromigration test, resistance measurements at ambient and several higher temperatures were performed to determine the copper thickness and the thermal coefficient of resistance (TCR) to assess the self-heating ΔT generated in the tested lines during electromigration experiments at 0.8 mA/cm2. According to Fig. 2, the narrowest lines have a thickness close to the expected value whereas lines above a 3 μm width present a homogenous population of average thickness 0.74 ± 0.01 μm. The

Discussion

Group 1 experiments can partly explain the reservoir effect that represent the via matrices at line end when vias are kept at same size. Indeed, by careful attention paid on observed defects, it can be understood that not only the length of the reservoir is taking part to the copper diffusion, but also its width, even if this direction is perpendicular to the electron flow. All copper atoms between vias take part to the diffusion. Fig. 12 evidences such a relation between the median time to

Conclusion

First interested by large copper interconnects carrying huge currents in circuits, this electromigration study allowed to better understand the reservoir effect linked to via matrices and to finally identify the total area composed of vias and inter-space as the key parameter defining the MTF.

Moreover, it was possible to convert one additional connecting via row in terms of current density increase for the line. This conversion may be even more efficient for low level lines in the full

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