Conduction mechanisms of silicon oxide/titanium oxide MOS stack structures

Abstract

During the last years, high-k dielectrics have been studied intensively looking for an alternative material to replace the SiO₂ films as gate dielectric in MOS transistors. Different materials and structures have been proposed. An important concern not yet solved, is the interfacial quality between high-k materials and silicon substrate. For this reason, stack structures with SiO₂ as an interfacial layer between silicon substrate and high-k film have been studied. In this contribution we analyze the main conduction mechanism observed in SiO₂/TiO₂ MOS stack structures obtained by room temperature plasma oxidation in different conditions and reactors. Films fabricated in a parallel-plate type reactor showed better quality with low current density where thermionic conduction mechanism is predominant. In lower quality films, for example those fabricated in a barrel type equipment, the current density is higher and the conduction mechanism observed is Poole–Frenkel. Finally we show that the presence of thermionic mechanism provides a weak thickness dependence and a strong current density reduction with respect to silicon oxide MOS structures with the same equivalent oxide thickness.

Introduction

During the last decades, the dimensions of MOS transistors (MOST) have been continuously scaled down. This reduction has produced the necessity of ultrathin gate dielectric films, with thickness less than 1.2 nm for the sub-100 nm technology node for high performance MOST [1].

It is well known that as the SiO₂ film thickness is reduced below 2 nm, several problems appear that limit its use as gate dielectric in MOST [1], [2], [3]. In order to continue with the device scaling, it is necessary to look for alternative gate dielectrics and structures.

Several high-k dielectric materials have been studied as possible candidates for this purpose, although several concerns have not yet been solved. Among them, low interfacial quality and stability [4], [5], as well as the small conduction band offset at silicon/dielectric interface [2], [3] as k increases, are the main problems that make difficult their application.

To avoid these problems, stack structures formed by a SiO₂ interfacial layer and a high-k dielectric over it have been proposed as possible candidates with the advantage of a better interface with silicon and a physically thicker overall layer [6], [7], [8], [9]. In this case the equivalent oxide thickness (T_eq) can be expressed as

$$T_{\text{eq}}=T_{{\text{SiO}}_2}+\frac{k_{{\text{SiO}}_2}}{k_{\text{H-}k}}·T_{\text{H-}k}$$

where $T_{{\text{SiO}}_2}$ and $k_{{\text{SiO}}_2}$ are the thickness and the dielectric constant of the underlying or interfacial SiO₂ layer in contact with the silicon substrate. T_H-k and k_H-k are the thickness and the dielectric constant of the high-k material.

According to (1), if a medium dielectric constant material is used in the stack, for example HfO₂ or ZrO₂, it will be necessary a very thin high-k layer in order to obtain an T_eq below 1.5 nm. In this case, the physical thickness would not be enough to maintain the benefits of high-k dielectrics.

On the other hand, if a higher dielectric constant film is used, the T_eq can be reduced even below 1.5 nm, with the benefits of both a good quality SiO₂ interfacial film and high-k material. A material such as TiO₂, with a dielectric constant between 40 and 100, could be used for this purpose. Its low band offset with Si may not be a problem due to the presence of the interfacial SiO₂. To verify this assumption, it is necessary to study the conduction mechanisms and barrier present in these structures, in order to determine their advantages and possibilities, as well as, to improve and control their properties.

Previously we reported stack structures formed by a TiO₂ layer on top of a SiO₂ layer obtained using room temperature plasma oxidation (RTPO) technique [10], [11]. In this contribution we complement the characterization of stack structures prepared under different conditions and using different reactor types, in order to determine their characteristics and the main conduction mechanism in each case. The expected general behavior and advantages are summarized indicating possible fields of application.