Experimental evidence of “latent gate oxide damages” in medium voltage power MOSFET as a result of heavy ions exposure
Introduction
In the last years many studies have been devoted to investigate the presence of “latent gate oxide damages” in MOS structures used in digital applications [1], [2], [3]. We think that the understanding of these “latent defectiveness” can be an helpful aid in the comprehension of the mechanisms of breach of the oxide layer of MOS structures induced by single energetic particles impact (single event gate rupture) [4], [5], [6], [7], [8], [9], [10].
Hence, in order to better understand the SEGR involved mechanisms, we have performed an experimental study for monitoring the time evolution of the gate damage during the heavy ions exposure in order to investigate the dependence of the gate damage amount to the “latent damages”.
To properly detect the presence of “latent damages” we have developed a new experimental set-up in which we have inserted a high resolution parameter analyzer (Agilent B1500 A) allowing us to monitor the increase of the gate leakage current with a pA resolution.
Section snippets
The choice of the biasing region
The first step of our study has been to define a region in which the device under exposure has to be suitably biased. In fact, the interaction between the energetic ion and the electric field inside the device must be sufficiently intense to trigger a “latent gate oxide damage” without causing a complete degradation of the oxide layer.
In the last years we presented an experimental set of SEGR data acquired in different bias conditions [6]. Unlike other experimental results [7], [8], [9], all
The experimental procedure
To investigate the formation of the latent damages into the gate oxide structure we performed a two phases experiment.
During the first phase the device was exposed to a very small bromine flux (∼1 ion/s) for about 30–50 s and biased in the large gradual pre-SEGR bias region. After the irradiation, in the second phase of the experiment, the device was biased with the same value of VDS and VGS = −10 V in absence of irradiation in order to reproduce a situation similar to that one observed during
The experimental results
In Fig. 4, we report the gate leakage current monitored during the exposure of a medium voltage power MOSFET irradiated by a total number of about 30–50 ions at a low ion flux. As shown in Fig. 4, the gate leakage current IGSS had no increase during the ions impacts. After the irradiation, in the second phase of the experiment, the device was biased with the same value of VDS and VGS = −10 V in absence of irradiation in order to reproduce a situation similar to that one observed during irradiation
Conclusions
In this paper we have presented the results of an experimental study that has the aim of investigating the formation of “latent gate oxide damages” in medium voltage power MOSFETs during the impact with energetic particles.
To properly detect the presence of “latent damages” we have developed a high resolution experimental set-up and identified an appropriate region in which the device have to be biased in order to trigger this kind of damage.
Other studies are on the way trying to identify the
Acknowledgement
The authors wish to acknowledge Prof. Lattuada and Dr. Rifuggiato of the INFN–Laboratori Nazionali del Sud for having permitted the experiment at that facility, and all the technicians for the assistance during the experiment.
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