Electrical characterization and reliability study of HEMTs on composite substrates under high electric fields
Introduction
Aluminum–gallium-nitride/gallium-nitride high electron mobility transistors (AlGaN/GaN HEMTs) are becoming optimum candidates for the fabrication of new high-power and high-frequency devices demanded by future wireless communication applications [1], [2]. Wide band–gap materials (like GaN) based devices exhibit superior inherent material properties compared to traditional implementations on silicon: higher breakdown electric field, higher electron mobility and saturation carrier velocity, and higher thermal conductivity. Epitaxial growth of these devices usually takes place on three types of substrate: sapphire, silicon, and silicon carbide (SiC). SiC substrate is typically the preferred one due to its high thermal conductivity, but, on the other hand, it is also the most expensive. In this work, we report on the complete electrical characterization in DC and high voltage pulsed regime, including ESD-like events, of T-gate HEMTs with different gate length (LG) and gate–drain head overhang length, made over new and potentially cheaper composite substrates: the SiCopSiC (mono-crystalline SiC on polycrystalline SiC), and the SopSiC (mono-crystalline Si on polycrystalline SiC) [3]. SiCopSiC substrate could significantly improve the cost of GaN HEMT structures, thanks to multiple usage of the high quality single crystal SiC, as the seed layer, combined with the high thermal conductivity of the inexpensive polycrystalline SiC, whereas SopSiC substrate could be dedicated to large volume applications, thanks to the fact that using silicon as seed layer it will provide large diameter substrate for device manufacturing (4 or 6 in.), with the benefit of the improved thermal conductivity offered by the polycrystalline SiC (as opposed to bulk silicon). If these solutions will prove to exhibit performances and reliability data comparable to devices grown on more established substrates (sapphire, SiC), they could provide in the near future a cost efficient solution that will leverage the use of advanced high-power devices in wireless communication systems [4].
Section snippets
Devices description
We have tested several SiCopSiC devices characterized by a width (W) of 80 μm and 1 mm, and gate length of 0.5 μm. Studied HEMTs have been made with a field-plate structure (T-shape gate), in order to reduce the electric field on the gate edges, and differ in the gate–drain head overhang length of 100 nm, 500 nm, 750 nm, and 1000 nm. More details can be found in [5], [6].
SopSiC devices tested in this work are GaN HEMTs grown by molecular beam epitaxy (MBE) on SOITEC SopSiC substrate, see [7], [8]. The
Electrical characterization in DC regime
A complete DC electrical characterization has been carried out using a Hp 4142 parameter analyzer under dark-light condition. Despite these devices are designed to operate in power microwave circuits, the DC electrical characterization is the starting point to evaluate the electrical parameters and performances of such devices, among other things the impact of self-heating phenomena on the drain current vs. drain–source voltage (I–V) curves. Furthermore, comparing DC and pulsed regime
Electrical characterization in pulsed regime
It is well known that the not yet established technological process could make GaN HEMTs prone to be affected by several factors that can impair both the performances and the reliability of such devices. For such reasons, DC regime measurements are often insufficient to fully characterize the device performances, whereas pulsed regime characterizations can offer more interesting results. We have characterized trapping effects and current collapse phenomena, that typically could impact on the
Electro-static discharge sensitivity
Electrical over-stress/electro-static discharge (EOS/ESD) events are universally recognized as critical issues potentially impairing almost any family of microelectronic devices.
We have tested the robustness of SiCopSiC and SopSiC HEMTs under ESD-like events (100 ns long TLP–TDR pulses) applied between drain and source, in floating gate condition (two-pins ESD event). In this configuration results can virtually be correlated to the human body model [11], using the typical conversion factor (1 A
Conclusion
A complete DC electrical characterization, DIVA-like analysis, and high voltage pulsed regime studies have been carried out on T-gate HEMT devices on SiCopSiC and SopSiC composite substrate. Such devices have exhibited optimum electrical performances, in both DC and pulsed regime, comparable to more expensive sapphire- or SiC-based HEMTs. We have shown that different gate–drain overhang lengths do not affect DC analysis, but, on the contrary, have a strong impact on both the slope of output
Acknowledgements
The authors would like to thank Karl Süss for providing a PM8 probe station in order to build the TLP–TDR on wafer system. This work is partially supported by the European Community in the frame of the HYPHEN project.
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Status of reliability of GaN-based heterojunction field effect transistors
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