The frequency-dependent electrical characteristics of interfaces in the Sn/p-Si metal semiconductor structures
Introduction
Metal-semiconductor (MS) Schottky structures are an essential part of virtually all semiconductor electronic and optoelectronic devices [1], [2], [3], [4], [5], [6]. Due to the technological importance of the metal-semiconductor structures which are of the most simple of the MS contact devices, a full understanding of the nature of their electrical characteristics is of greater interest [1], [2], [3], [4], [5], [6], [7], [8], [9], [10]. In particularly, Si-contacts play one of the most important roles in Si-device or technologies represented by integrate circuit (IC), large-scale integration (LSI) and very-large-scale integration (VLSI). The role of the contacts is to interconnect individual devices (transistors, diodes and so on) in a Si chip and connect them as a whole to the outer circuit. These contacts are numerous in a chip and can easily total more than one million [6]. The performance and reliability of these structures are especially dependent on the formation of insulator layer between metal and semiconductor interface and series resistance of structures. Also, the changes in frequency and voltage have an important effect on determination of the MS structures [7], [8]. Therefore, the frequency and voltage dependence electrical properties of MS structures are very important for different applications.
The interface states and series resistance values of metal-semiconductor structures are important parameters that affect their main electrical parameters [9], [10], [11], [12]. The values of the capacitance and conductance depend on various parameters, such as density of surface states, series resistance, insulator layer thickness and barrier height formation between metal and semiconductor. Therefore, the capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of a metal semiconductor structure are extremely sensitive to interface state density at the MS interface [12], [13], [14], [15], [16], [17], [18], [19], [20], [21]. When voltage is applied across the MS device, the combination of the interfacial insulator layer, depletion layer and the series resistance of the device will share applied voltage. Furthermore, some investigations [11], [12], [22] have reported an anomalous peak in forward C–V characteristics. The origin of such peaks has been ascribed to the interface states [12] and to the series resistance effect [22], [23]. It has been shown that the interface states density strongly depends on frequency, and exponentially decreases with increasing frequencies. The C–V curves give peak in the depletion region due to the particular distribution of interface states between Sn/p-type Si interface and effect of series resistance, respectively. The position of peaks in the C–V curves is shifting towards reverse bias region with increasing frequency and almost disappears at high frequencies. This occurs because at lower frequencies the interface states can follow the ac signal and yield an excess capacitance, which depends on the frequency. However, the values of the capacitance at the high frequency region originate from only space charge capacitance, and at higher frequencies (as described above) interface states cannot follow the alternating current (ac) signal [1], [2], [14], [15], [22], [23]. Thus, the series resistance (RS) and interface states density values (NSS) at metal-semiconductor structures play an important role in the determination of the main parameters of the structures. In general, the C–f and G/ω–f plots in the idealized case are frequency-independent [23], [24]. Thus, characterization of MS Schottky structures can be electronically made by conductance technique [7]. Since the interface excess capacitance depends on the frequency, the capacitance peak in the C–V plot is affected [24], [25], [26], [27]. It is therefore important to include the effect of the frequency and series resistance and examine in detail the frequency dispersion of capacitance in the forward capacitance–voltage and conductance–voltage characteristics.
MS Schottky diodes formed by depositing various metals on the Si have been studied over a wide frequency range [7], [22]. The values of the capacitance and conductance depend on various parameters, such as density of surface states, series resistance, insulator layer thickness and barrier height formation between metal and semiconductor. As explained above, in recent studies, some researches [22], [27], [28], [29] have reported an anomalous peak in the forward bias (C–V) characteristics. Among these very interesting study is presented by Kılıçoğlu [19]. Chattopadhyay and Raychaudhuri [28] have been shown that, in the presence of a series resistance, the C–V characteristics should exhibit a peak. The peak value of the capacitance (C) and its position depends on a number of various parameters such as, doping concentration, series resistance of device, and the thickness of the interfacial insulator layer [27], [30].
The various experimental works have been studied on Si crystals using different metals as rectification contact [4], [8], [9], [12], [15], [16], [17], [18], [19], [20], [21], [22], [30], [31]. However, literature reports on the of frequency and voltage dependent electrical characteristics of Sn/p-Si (MS) Schottky structures using C–V and G/ω–V (in the frequency range of 50 kHz–1 MHz) measurements are rare. Therefore, in this study, we have investigated the frequency and voltage dependences of the electrical characteristics of Sn/p-Si (MS) Schottky diodes using C–V and G/ω–V measurements. To determine accurate values of RS and NSS of the Sn/p-Si Schottky diodes, we have applied the method by Nicollian and Brews [7]. Furthermore, the NSS distribution profiles of Sn/p-Si Schottky diodes were obtained from the forward bias I–V dates as a function of frequency. Experimental results clearly show that both NSS and RS are important parameters that influence the electrical characteristics of MS structures.
Section snippets
Experimental procedure
The Sn/p-type Si Schottky (MS) diodes were fabricated on 2 in. diameter p-type single crystal silicon wafer with (1 0 0) surface orientation and 6.248 Ω cm resistivity. The wafer was chemically cleaned using the RCA cleaning procedure. The RCA cleaning procedure is the industry standard for removing contaminants from wafers. The RCA cleaning procedure has three major steps used sequentially: (i) organic clean: removal of insoluble organic contaminants with a 5:1:1 H2O:H2O2:NH4OH solution, (ii) oxide
Results and discussion
Conductance technique is based on the conductance losses resulting from the exchange of majority carriers between the interface states and majority carrier band of the semiconductor when a small ac signal is applied to the semiconductor structures [6]. The applied ac signal causes the Fermi level to oscillate about the mean positions governed by the bias dc bias, when the semiconductor device is in the depletion. The voltage dependent capacitance–frequency plots show the variation of the
Conclusion
In this study, capacitance–voltage (C–V–f) and conductance–voltage (Gω–V–f) characteristics of the metal-semiconductor (Sn/p-Si) Schottky structures were investigated in the frequency range of 50 kHz–1 MHz at room temperature. The experimental results confirmed that both the measured capacitance and conductance varies with applied voltage and frequency, and increases with decreasing frequency in depletion and accumulation region due to a continuous distribution of interface states between metal
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