SrO capping effect for La₂O₃/Ce-silicate gate dielectrics

Abstract

The chemical bonding states and electrical characteristics of SrO capped La₂O₃/CeO_x gate dielectric have been examined. Angle-resolved X-ray photoelectron spectroscopy measurement has revealed that Sr atoms diffuse into silicate layer to form SrLa-silicate after annealing. Owing to the incorporation of Sr atoms into silicate layer, a transistor operation with an equivalent oxide thickness (EOT) below 0.5 nm has been demonstrated. A strongly degraded effective electron mobility of 78 cm²/V s at 1 MV/cm has been obtained, which fit well with the general trend in small EOT range below 1 nm. Although process optimization is needed to improve the performance of transistors, Sr capping technique can be useful for EOT scaling.

Introduction

Miniaturization of metal–oxide-semiconductor field-effect transistors (MOSFET) has been the driving force for performance improvement in microelectronics [1]. Among many device parameters, continuous scaling in equivalent oxide thickness (EOT) below 1 nm by introducing high-k gate dielectrics has enabled to sustain the scaling trend by obtaining higher drain drive current with low leakage current [2]. The next challenge for the high-k gate dielectric research is to achieve higher k-value for further scaling in EOT. Indeed, an EOT below 1 nm has been achieved by adopting an optimized heat treatment of Hf-based oxide to remove the SiO_x-based interfacial layer of low dielectric constant [3]. Also, a proper metal gate material selection to control the oxygen atoms to scavenge the interfacial layer has been reported to achieve an EOT close to 0.5 nm with Hf-based oxide [4], [5], [6]. Besides these approaches, it has been reported that La₂O₃, one of rare earth oxides, can achieve a small EOT by forming La-silicate layer eliminating the formation of SiO_x-based interfacial layer even after high temperature annealing up to 1000 °C [7]. The silicate reaction commonly occurs when rare earth oxides are stacked on Si because the free energy (ΔG) of the silicate reactions is less than −100 kJ/mol [8], which is lower than other transition metals. The reactivity of rare earth oxides with Si depends on the elements and the dependence has been explained by the ion radii of rare earth atoms [9]. In order to improve the dielectric properties such as leakage current and mobility, in general, an annealing at rather high temperature is needed. This annealing, however, tends to increase the thickness of the silicate layer and to increase the EOT, which is one of the concerns for gate dielectric applications. Ce-silicate is a candidate among rare earth silicates to solve this dilemma [10]. Another solutions can be a Sr addition. Recently, doping of Sr atoms into HfO_x-based gate dielectrics has been reported to increase the dielectric constant with reduced gate leakage current [11]. The combination of using the Ce-silicate and the Sr addition is expected to improve the dielectric properties significantly with very small EOTs. In this paper, the effect of Sr capping on a La₂O₃/CeO_x structure is discussed. The chemical bonding states were measured by X-ray photoelectron spectroscopy (XPS) and its electrical characteristics were evaluated through measurement of transistors.