Guest EditorialAdvances in Wafer Level Packaging (WLP)
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Wafer level package of Au-Ge system using a Ge chemical vapor deposition (CVD) thin film
2016, Applied Surface ScienceCitation Excerpt :As an imperative step, stacking technology can be divided into three crucial techniques: chip-to-chip (c2c), chip-to-wafer (c2w) and wafer-to-wafer (w2w). Wafer Level Package (WLP), which utilizes w2w technique for stacking, is one of the most advanced packaging concepts extensively employed as the mainstream for 3D IC stacking and packaging in semiconductor industry [5]. The WLP can significantly reduce the package size of portable semiconductor devices, micro-electro-mechanical systems (MEMS), CMOS (complementary metal oxide semiconductor) image sensors (CIS), pressure sensors and biosensors, thus allowing downsizing and cost reduction.
Stress evolution during thermal cycling of copper/polyimide layered structures
2014, Materials Science in Semiconductor ProcessingCitation Excerpt :Wafer level packaging (WLP) is one of the fast growing segments in semiconductor packaging industry due to the huge demands for faster, smaller, yet less expensive electronic products with high performance and low-cost [1,2]. The redistribution layer (RDL), which re-routes the peripheral I/O layout into a new area array footprint for solder bumping, is an important technology in WLP [1–3]. Polyimide (PI) and electro-chemically deposited (ECD) Cu are often adopted in the RDL serving as dielectric layer and metal trace, respectively.
Numerical Study on the Influence of Polyimide Thickness and Curing Temperature on Wafer Bow in Wafer Level Packaging
2023, Advancing MicroelectronicsNumerical Study on the Influence of Polyimide Thickness and Curing Temperature on Wafer Bow in Wafer Level Packaging
2023, 24th European Microelectronics and Packaging Conference, EMPC 2023Thermal-mechanical reliability analysis of WLP with fine-pitch copper post bumps
2020, Soldering and Surface Mount TechnologyAu-Si eutectic bonding technology and its application
2015, Nami Jishu yu Jingmi Gongcheng/Nanotechnology and Precision Engineering