High temperature reliability of μtrench Phase-Change Memory devices
Introduction
Phase-Change Memory (PCM) technology is considered nowadays an emerging rival for Flash memories [1]. The maturity achieved in the last few years by PCM in terms of performances suggests a key role for PCM technology in the future memory market [2], [3]. Furthermore, it has been demonstrated that phase change memories can follow the scaling roadmap: the 45 nm generation has been developed in a final product [4] and the 20 nm generation has been already demonstrated [5]. Nevertheless the strong impact of the temperature on the behavior of a Phase-Change Memory cell is well known. It affects the reliability of PCM devices giving rise to effects like thermal crosstalk during programming operations [6]. Key studies of the static and dynamic characteristics of the PCM devices highlighted the drift in time of the threshold voltage (Vth) and of the resistance of the cell and their high dependence on temperature [7], [8]. Data retention at high temperatures is an important feature that non-volatile memories have to guarantee. Besides, applications like automotive case require reliable operations at 125 °C and, in general, the market demands for proper operation at high temperatures are growing. A detailed description of the reliability at high operating temperatures is then needed for PCM devices, as already provided for standard non-volatile memory technologies [9].
In this light, we propose here a detailed investigation of the reliability of μtrench PCM devices at high operating temperatures. At the same time we perform our analysis on different μtrench dimensions, confirming the low impact of the scaling on material dynamics in μtrench based PCM technology.
Section snippets
The μtrench memory cell structure
The schematic in Fig. 1 describes the μtrench analytical structure considered in this work. The heater thickness (30 nm) is controlled by film deposition, and the trench dimension by lithography: in our study, we analyze PCM cells with four different trench width ranging from 300 nm to 1 μm. From now we will refer to our samples by the trench width. In the inset of Fig. 1 is reported the cross-section TEM image of our μtrench cell showing the interface between the phase change material and the
Electrical characterization
The electrical performances and reliability tests of analytical μtrench memory cells have been analyzed (on a minimum of six devices for each trench width) by means of a completely automatic setup equipped with hot-chuck system. During a general programming operation, a pulse is applied to the series of a load resistance and the PCM cell device. The programming current is acquired by monitoring the voltage drop on the load resistor.
Simulation results
The thermal stress of our μtrench cell during the RESET and the SET pulse have been analyzed in detail using simulations that make use of Level Set numerical approach to model crystallization kinetics [12]. We simulated in particular the electro-thermal behavior of the μtrench cell during the application of a SET pulse to a cell pre-programmed in the RESET state. In Fig. 8, we report the thermal profile in the cell after 0.7 ns from the effective electronic switch, before the recovery of the
Conclusions
In this paper, we addressed the critical topic of PCM reliability at high operating temperatures. In particular, we presented the electrical performances of μtrench GST PCM devices at temperatures up to 180 °C. We showed the linear decrease of the threshold voltage, the changes in the programming resistance window and the decrease of the RESET current with increased temperature. Furthermore we highlighted the significant increase of the endurance of the cell explained by means of physical
Acknowledgement
This work has been performed in the framework of the CATRENE REFINED Project.
References (12)
- et al.
Phase change memory
Proc IEEE
(2010) Chalcogenide PCM: a memory technology for next decade
IEDM Tech Dig
(2009)- et al.
Non-volatile semiconductor memories for nano-scale technology
IEEE-NANO
(2010) A 45 nm generation phase change memory technology
IEDM Tech Dig
(2009)- et al.
PRAM cell technology and characterization in 20 nm node size
IEDM Tech Dig
(2011) - et al.
Modeling of programming and read performance in phase-change memories – Part II: Program disturb and mixed-scaling approach
IEEE Trans Electron Dev
(2008)
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