IMC growth reaction and its effects on solder joint thermal cycling reliability of 3D chip stacking packaging

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Abstract

The study aims at assessing the growth reaction of the Ni3Sn4 intermetallic compound (IMC) during bonding process and its dependences on the thermal-cycling reliability of the Cu/Ni/SnAg micro-joints of an advanced 3D chip stacking package under accelerated thermal cycling (ATC) loading. The growth reaction of the IMC during bonding process is also predicted through experiment and classical diffusion theory, and the relation between the IMC thickness and bonding process temperature and time is derived according to the predicted activation energy of the chemical reaction between Sn and Ni by experiment. Moreover, the micro-joint reliability prediction is made using finite element (FE) analysis incorporated with an empirical Coffin–Manson fatigue life prediction model and also ATC experimental test. To facilitate the FE modeling, the temperature-dependent thermoelastic properties of both single crystal and polycrystalline Ni3Sn4 IMC are characterized through molecular dynamics simulation and the Voigt–Reuss bound and Voigt–Reuss–Hill approximation.

Results show that monoclinic single crystal Ni3Sn4 reveals a high elastic anisotropy or direction dependence of elasticity. The diffusion reaction of Sn and Ni exhibits that a longer bonding process time and a higher bonding temperature could not only increase the IMC thickness but also vary its surface morphology. In addition, the thermal–mechanical performance of the micro-joints is strongly affected by the geometry and material of IMC layer, where IMC with a thicker thickness, a less Young’s modulus, a smaller CTE and even a more rounded surface morphology can better the reliability.

Introduction

Nowadays, integration ofElsevier Ltd multi-media functions using 3D IC packaging technology has become increasingly essential and crucial due to the ever-increasing demands for mobile devices with great functional diversification, heterogeneity, miniaturization and high performance. To meet the growing challenges, in addition to the revolution of IC circuit design, great engineering efforts are presently being placed on the development of high-reliability, high-performance three-dimensional (3D) chip stacking packaging with micro-bump and through silicon via (TSV) technology. As compared to other flip chip technology [1], [2], [3], there are many implied advantageous features in the packaging technology, including increased function density, reduced package profile and interconnect length, and enhanced electrical performance. In recent years, considerable 3D IC packaging technologies have been proposed [4], [5], [6], [7], [8], [9]. For example, a high-density 3D chip-on-chip packaging technology using fine-pitch micro-bumps was proposed by Zhan et al. [9]. In this technology, the chip embedded with an extensive number of Cu/Ni micro-bumps are assembled to a silicon chip or interposer using a lead-free solder Sn2.5Ag through thermocompression bonding and underfill dispensing processes. Unfortunately, many critical problems or challenges remain to be solved prior to the feasibility of the technology [10], [11]. For instance, the system integration of various heterogeneous and homogeneous components in a mobile device would inevitably create high power density, as a result potentially leading to high local temperature and also stresses/strains. High local stresses/strains are the main cause behind the failure of electronic components, such as interconnects. The challenges become more critical with the increasing downsizing requirement of high-density electronic devices/components. Therefore, prior to the successful application of the 3D IC interconnect technology, a full understanding of their thermal–mechanical reliability is essential.

It is generally believed that an appropriate thickness of Ni layer can help prevent the Cu metal in the micro-bumps from chemical reaction with the Sn metal of the Sn2.5Ag solder to form some hard and brittle Cu–Sn intermetallic compounds (IMCs), such as Cu3Sn [12] and Cu6Sn5. Instead, a Ni3Sn4 IMC layer will occur at the interface between the Ni layer and the Sn metal of the Sn2.5Ag solder. It was reported [13] that a thin IMC layer with few-micrometer thickness can create good metallurgical bonding strength due to its hard and brittle properties. However, as the thickness of the IMC layer continues to increase up to a certain level, the shear strength of the micro-joints might be greatly decreased, thereby causing an increasing concern on their drop-impact reliability. Basically, there is an inverse relation between IMC thickness and drop-impact reliability of the solder joints [14]. By contrast, their impact on the thermal-cycling reliability of solder joints remains not fully clear. In literature, the micro-joint reliability of 3D chip stacking packaging technology under accelerated thermal cycling (ATC) loading has been theoretically and experimentally investigated (see, e.g., [15], [16], [17]). For instance, Kuo et al. [15] performed temperature cycling test and pressure cooker test on the proposed printed circuit board processing compatible structure of 3D chip stacking with 10 layers, and found that the proposed low-cost packaging technology is a reliable structure for 3D system in packaging (SiP) module application. In view of the great effects of process-induced thermal stresses around TSVs on the reliability issues, such as Si cracking and performance degradation of devices, Chen et al. [16] investigated the thermo-mechanical behaviors of 3D stacked-die package with TSVs under accelerated thermal cycling test condition using FE simulation with sub-modeling technology, and further performed design of experiments using Taguchi method for optimal and robust design of 3D stacked-die package. Recently, Cheng et al. [17] applied FE simulation and ATC experimental testing to assess the interconnect reliability of the 3D chip-on-chip packaging technology [9]. They found that underfill not only has a great impact on the thermal fatigue life of the interconnect but also vary the failure mechanism of the interconnects from an interfacial crack to a cohesive solder failure. Unfortunately, in that work, the effects of the surface morphology (shape) and material property of the IMC layer on the micro-joint reliability were not well addressed, not to mention the study of the growth reaction of the IMC. Besides, the temperature-dependent thermoelastic material properties of the Ni3Sn4 IMC, which are crucial to the micro-joint reliability prediction, were not numerically and experimentally characterized.

The study attempts to investigate the influences of IMC material and geometry (i.e., thickness and surface morphology) on the thermal cycling reliability of the micro-joints of the advanced 3D chip stacking package (Fig. 1) through FE simulation and ATC test. Prior to the reliability assessment, the temperature-dependent thermoelastic materials of the Ni3Sn4 IMC are first characterized using molecular dynamics (MD) simulation together with the Voigt–Reuss (VR) bound [18] and Voigt–Reuss–Hill (VRH) approximation [19]. Moreover, the growth reaction of the Ni3Sn4 IMC during the thermocompression bonding process is also studied through experiment and classical diffusion theory to determine the dependence of the Ni3Sn4 IMC thickness on the bonding process parameters.

Section snippets

Growth reaction of Ni3Sn4 IMC

The growth rate of IMC layer is mainly attributed to the growth kinetic [20]. IMC growth in the interface between Ni and Sn metal can be considered as an ordinary diffusion process, and is controlled by their inter-diffusion. The reactive diffusion between Ni and Sn metal was experimentally investigated by Chen and Chen [21] using Sn/Ni/Sn diffusion couples prepared by a soldering technique. Their experimental results show that the thickness of the Ni3Sn4 layer is nearly proportional to the

Ni3Sn4 nanocrystal structure

Monoclinic Ni3Sn4 nanocrystal, as shown in Fig. 2, is a binary alloy system. The structure of the nanocrystal was extensively described by Jeitschko and Jaberg [23], where the lattice constants, i.e., a, b and c in the figure, are 12.21 Å, 4.06 Å and 5.22 Å. In the MD simulation, a Ni3Sn4 unit cell or cuboid is equivalent to a monoclinic Ni3Sn4 nanocrystal, where it consists of 6 Ni atoms (the small spheres) and 8 Sn atoms (the large spheres). It is also shown that the atom distribution in the

Packaging structure

The 3D chip stacking packaging (see, Fig. 1) contains one rectangular silicon chip with 3216 fine-pitch Cu/Ni micro-bumps as interconnects. The chip is bonded onto a piece of silicon interposer by way of Sn2.5Ag lead-free solder through a gap-control thermocompression bonding process [9]. The final standoff height of the micro-joints after the bonding process is about 0.022 mm. As can be seen in Fig. 1a, due to the chemical reaction between the Ni layer and the Sn of the SnAg solder, two thin Ni3

Thickness growth of Ni3Sn4 IMC layer

The diffusion reaction of the Ni3Sn4 IMC at the interface between the Ni and SnAg metal during the bonding process is presented in this section. The study first explores the activation energy of the chemical reaction of the Ni with the Sn metal through parametric experimental study and classical diffusion theory. According to the classical diffusion equation (Eq. (1)), the growth reaction of the IMC layer can be explored by varying the bonding temperature from 250 °C, 275 °C to 300 °C and also

Conclusions

The study extensively investigates the growth reaction of the Ni3Sn4 IMC layer during the bonding process through experiment and classical diffusion theory, and also, its impacts, including material and geometry (i.e., thickness and surface morphology), on the solder joint thermal cycling reliability of an advanced 3D chip stacking package using FE analysis and also ATC experimental test. The predicted activation energy in the diffusion reaction of Sn and Ni metal is127.8 kJ/mol, which agrees

Acknowledgement

The work is partially supported by National Science Council, Taiwan, ROC, under Grants NSC98-2221-E-007-016-MY3 and NSC100-2221-E-035-036-MY3.

References (43)

  • C. Andersson et al.

    Comparison of isothermal mechanical fatigue properties of lead-free solder joints and bulk solders

    Mater Sci Eng A

    (2005)
  • N. Jiang et al.

    Thermal expansion of several Sn-based intermetallic compounds

    Scr Mater

    (1997)
  • C.T. Peng et al.

    Reliability analysis and design for the fine-pitch flip chip BGA packaging

    IEEE Trans Compon Packag Technol

    (2004)
  • Zhan CJ, Chuang CC, Juang JY, Lu ST, Chang TC. Assembly and reliability characterization of 3D chip stacking with 30um...
  • Lau JH. Critical issues of 3-D IC integrations. In: Proceedings of IMAPS international symposium on microelectronics;...
  • H.C. Cheng et al.

    Strain- and strain-rate-dependent mechanical properties and behaviors of Cu3Sn compound using molecular dynamics simulation

    J Mater Sci

    (2012)
  • Y.C. Chan et al.

    Reliability studies μBGA solder joints-effect of Ni–Sn intermetallic compound

    IEEE Trans Adv Packag

    (2001)
  • J.Y. Kim et al.

    Effect of Cu content on the mechanical reliability of Ni/Sn–3.5Ag system

    J Mater Res

    (2007)
  • Kuo TY, Chang SM, Shih YC, Chiang CW, Hsu CK, Lee CK, et al. Reliability tests for a three dimensional chip stacking...
  • Chen Z, Song B, Wang X, Liu S. Thermo-mechanical reliability analysis of 3D stacked-die packaging with through silicon...
  • Cheng HC, Tsai YM, Lu ST, Chen WH. Interconnect reliability characterization of a high-density 3D chip-on-chip...
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