The wire sag problem in wire bonding technology for semiconductor packaging

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Abstract

Driven by the smaller, faster and cheaper demands of advanced microelectronic devices, the modern packages are required to increase I/O numbers, reduce die and package sizes and lower manufacturing costs. Although, today’s microelectronic devices have many modern types of package, e.g. flip chip, wafer level packaging and tape automated bonding technologies, wire bonding is still the dominant microelectronic packaging technology.

To provide more functions within a package, the 3-dimensional and multi-chip modules have come to be the solution of choice in delivering higher integration, smaller and more functional products for meeting consumer requirements, especially in the portable and handheld electrical products.

Since the interconnection distance of the multi-chip modules is usually longer than that of a single-chip system, concerns about wire sweep and wire sag for the applications of 3-dimensional packaging technology in the multi-chip module systems have been highly mentioned recently.

This has been ascertained by the author in previous studies, the longer the bond length and the higher the bond height of a wire bond, the smaller the sweep stiffness of the bond system becomes. The lower sweep stiffness of the wire bond will always cause higher risk of wire sweep. Consequently, for 3-dimensional and multi-chip packaging, excessive wire sag can lead to wire touch in the lower layer and thereby causing short circuits and malfunction of chips.

Wire sag problems are very crucial to the applications of 3-dimensional and multi-chip packaging in semiconductor industry. To authors’ knowledge, this issue has never been investigated. The main purpose of this paper will be to study in depth the wire sag problem for long wire bonds, applied in 3-dimensional and/or in multi-chip module packaging. A definition of the sag stiffness of a wire bond will be shown to represent sag resistance of specific profiles of wire bond. The author will also present wire sag experiments of wire bonds thereby verifying numerical analysis.

Introduction

To meet the requirements of lightness, thinness, and multi-functional new state-of-the-art electronic products, the needs of bond span, bond height and die thickness of the wire bonding will not be the same in the multi-chip module and/or 3-dimensional chips. Consequently controlling wire sweep and wire sag will be extremely essential in the near future. This is why so many multi-national companies like K&S and Japan’s TANAKA have made consummate efforts to develop low wire sweep wires and thereby reduce the pitch of wire bond allowing more junctions of wires. According to recent investigation, wire bonding technology still dominates more than 90% of the packaging market because of its cost effectiveness and flexibility. Also huge expenditures have been invested in an accumulation of materials, equipment and manpower for decades [1], [2], [3], [4], [5], [6].

There have been studies on wire-sweep analysis in the literature. An approximate solution of sweep deflection can be obtained by representing the wire geometry as a part of circular arch in [7]. However, the geometry of the wire bond is different from a portion of circular arch. Nguyen et al. [8], [9], [10], [11] derived the wire deformation equation by simplifying the complicated analytical solution. Tay et al. [12], [13] utilized a 2-D creep flow model to predict the velocity distribution and the flow load acting on the wire bond. The buckling and plastic deformation of wire bonds with in-plane flow load was also studied. Han and Wang [14], [15] studied drag forces of the gold wire sweep by using a video system and a three-stage wire sweep analysis (global-flow analysis, local-flow analysis and wire-sweep deformation analysis) was brought up by them. The characterization of functional relationship between temperature and microelectronic reliability is systematic studied by Lall et al. [16], [17]. The role of temperature in achieving cost-effective reliable electronic equipment has been evaluated based on failure mechanisms and electrical parameter variations. The model has been validated where wire flexural fatigue is a dominant failure mechanism [18], [19].

In the multi-chip module and/or 3-dimensional chips, the maximum diameter of Au bonding wire is always used in order to avoid wire sweep and wire sag possibly inducing short circuits and chip failure. From a material’s expenditure point of view, it is an extremely extravagant luxury, especially, when considering the unpredictability of gold prices on a day-to-day basis. In these stacked die packages, their wire bonds usually possess longer and higher interconnections than conventional individual chip packages. As we advance in the development of electronic packaging, the bond pitch and the layer pitch are becoming smaller and smaller [20], [21], [22], [23], [24].

The bond pitch and the layer pitch are very crucial for semiconductor packaging. In the transfer molding process, the epoxy compound flow may induce visible wire deformation. This wire deformation can be parallel to the leadframe plane as denoted wire sweep or perpendicular to the leadframe plane as denoted wire sag (or wire rise). Wire sweep occurs typically in lateral movement in the direction of the compound flow through the cavity. Moreover, wire sag represents the downward deformation of a wire bond. Excessive wire sweep and wire sag can seriously induce wire crossover and shorting. Thereby causing, wire sweep and wire sag (caused by the encapsulation process) to become main concerns in the semiconductor packaging industry. In this study, the proposes definitions of sweep stiffness and sag stiffness are employed to measure the resistance ability of wire bond to parallel and perpendicular drag force instead of conventional wire sweep index.

However, in packaging industries, research is still being carried out on a trial-and-error basis to adjust bonding parameters, for meeting design criteria. This trial-and-error process is inefficient, excessively costly, and is unable to fit the demands of shorter product cycles. There have been studies on sweep stiffness and wire-sweep analysis by Kung et al. [25], [26], [27], [28], [29]. Yet, to the best of our knowledge, experimental measurements on sag stiffness of a wire bond have never been documented. In this study, the sag stiffness will have the author trying to define the resistance ability of a wire bond to the downward sag deflection due to the transfer molding process. The sag experiments of wire bonds will be conducted to verify with numerical analysis. Conclusively displaying the correlation between bond heights and bond spans, in affecting wire sag deflection.

Section snippets

Theoretical development of the sag stiffness of a wire bond

A typical 3-dimensional wire bond layout is displayed in Fig. 2.1. There are three layers of these chips in the packaging. In this case, a gold wire with 15 μm diameter is used. The corresponding die thickness and bond height are 100 μm and 150 μm, respectively. Bond spans of the chips are 2 mm, 2.5 mm and 3 mm for bottom layer, middle layer and top layer. Therefore, each wire bond may be equipped with various bond spans, bond heights and die thicknesses within its 3-dimensional package, as shown

Wire sag experiments

In order to predict the behavior of wire sag during the packaging processes, the material properties of gold wire must first be obtained. The gold wire used in this study is AW-99, a product of Kulickle & Soffa Co., with a 15 μm in diameter. The elastic modulus of AW-99 gold is 67.5 GPa, as performed in our laboratory. In order to obtain the accurate elastic modulus of AW-99 gold wire, a set of tensile tests must be conducted in this study. The diameter of the gold wire is so small that the

Numerical results of wire sag

The objective of the finite element analysis is to address the prediction of the deflection of wire sag deflection subjected to drag during the transfer molding process. A 3-D element of ANSYS, commercial FEA software, is used to numerically simulate the wire bond response on the deflection. A concentrated force, summation of uniform drag of the whole wire, is applied to the wire in order to compare with the results of wire sag experiments obtained in the whole of this study.

For simplicity, the

Conclusions

The wire sag problem in wire bonding technology for semiconductor packaging is investigated in this paper. A wire sag stiffness methodology is proposed for evaluation of sag sweep of wire bonds. The definition of sag stiffness is presented to measure the resistance ability of sag defection of a wire bond. From the numerical results, a wire bond with higher sag stiffness will retain a higher sag deflection resistance ability than others. A set of sag experiments is conducted by a lab-made micro

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