Reliability of through-silicon-vias (TSVs) with benzocyclobutene liners
Introduction
Three-dimensional (3D) integration, which uses through-silicon-vias (TSVs) and wafer bonding to integrate multiple chips on the third direction, has been recognized as a promising technology for integrated circuits (ICs) to achieve further improvement on performance, heterogeneous integration of different technologies, and sophisticated functionalities [1], [2], [3], [4], [5]. The attractive foregrounds have promoted extensive research on 3D integration, and various fabrication technologies have been established for different applications [4], [5], [6], [7], [8]. Despite the significant advances in recent years, 3D integration is still facing several challenges, in particular the thermal related reliability issues.
Due to high density of active devices and complicated structures, the thermal problems, which have already been a tricky problem in 2D ICs, are even more serious in 3D integration. The large mismatch in the coefficients of thermal expansion (CTE) between silicon and copper causes significant thermal stresses inside TSVs and surrounding substrate [9]. Large thermal stress could lead to potential mechanical reliability problems such as die failure of cracks or breakage [10], copper pumping [11], and interfacial delamination [12], [13], [14]. Even the stress is not large enough to cause die failure, it can lead to mobility changes and thus parametric shifts of transistors, affecting the performance and tolerances of integrated circuits (ICs) [15], [16]. Besides, the scallops on the via sidewalls inherent to Bosch process may cause non-conformal deposition of silicon dioxide liners and barriers [17], which together with the high stress concentration at the sharp ridges, could induce reliability problems such as copper diffusion, electromigration, and current leakage [18], [19], [20], [21], [22].
To address these problems, polymers have been proposed as either part of TSVs [23], [24], [25], [26] or as an alternative to conventional silicon dioxide insulation layers (liners) [27], [28]. Thick polymers are expected to have the potential to address the mechanical and electrical reliability problems. For example for polymer liners, the large and uniform thickness (1–5 μm vs. SiO2 0.1–1 μm) allow to avoid the problems of copper diffusion by eliminating the discontinuity of the barrier layer and current leakage by increasing the thickness of liners. In addition, the low elastic moduli and soft feature of polymer liners enable them to deform more largely than silicon and metals, and thus allow polymer liners to act as a buffer layer between silicon substrates and copper plugs to alleviate the thermal stresses [21]. Besides, the low dielectric constants of polymers (normally around 3 [29] vs. SiO2 3.9), in conjunction with the large thickness, allows to achieve low capacitance and high electrical performance [27].
To exploit the advantages of polymers, this paper reports the implementation of TSVs with benzocyclobutene (BCB) polymer liners by developing a vacuum-assisted spin-coating method to fill BCB claddings in high aspect-ratio annular trenches. BCB has been chosen as the liner material due to some attractive features, such as low de-gassing property, low dielectric constant, low stress, good coverage, and excellent chemical resistance and high thermal stability (glass transition temperature Tg > 350 °C) [30], [31]. The reliability issues of BCB TSVs regarding to leakage current, thermal shock, BCB barrier capability, and thermal stress and thermal expansion are investigated experimentally and numerically.
Section snippets
Fabrication of BCB liner TSVs
Fig. 1 shows the schematic fabrication processes for BCB liner TSVs applied in 3D integration systems. First, annular trenches are etched to the intermediate isolation layer using inductive coupled plasma (ICP) on the backside of a device wafer that is thinned and bonded with a host wafer, as shown in Fig. 1a. Then, BCB (Dow Chemical, CYCLOTENE 3022) is filled into the annular trenches using spin-coating, followed by chemical mechanical polishing (CMP) to remove the polymer overburden, as shown
Leakage current
The insulation capability of the BCB liner is evaluated by measuring the leakage current between the probe pad and the silicon substrate using Keithley 4200 semiconductor characterization system at room temperature. DC voltage is applied between the probe pad and silicon substrate, then the corresponding leakage current is measured. The applied voltage increases from 0 V to 40 V with an increasing step of 0.15 V. The BCB TSVs have a depth of 65 μm, a copper diameter of 20 μm and a BCB liner width of
Conclusions
The reliability issues of BCB TSVs in terms of temperature shock, copper diffusion, and thermal stresses have been investigated through experimental measurement and numerical simulation. The leakage current of a single BCB TSV is on pA level at 40 V, and does not change significantly after 40 times thermal shocks between −65 °C to +150 °C. Due to the difficulty in measuring the element concentration in the substrate near the TSVs, planar BCB films are employed to evaluate the barrier function to
Acknowledgments
This work was supported by the 973 Program under Grant 2011CBA00603, NSFC under Grant 61271130, and China Postdoctoral Science Foundation under Grant 2011M500320.
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