Novel ESD protection solution for single-ended mixer in GaAs pHEMT technology
Introduction
Electrostatic discharge (ESD) induced failure is a very important reliability issue for the pseudomorphic high electron mobility transistor (pHEMT) based radio-frequency integrated circuits (RF ICs) [1], [2]. The ESD-induced reliability issue is further worsened by the inherent low thermal conductivity of compound materials like GaAs and AlGaAs [3]. There has been a growing demand recently for highly effective and robust ESD protection solutions in the pHEMT process.
Stacked Schottky diode chain has been widely used as ESD protection circuits in GaAs pHEMT process [4], [5]. But this approach could consume a very large area under high-voltage protected pins due to its relatively small turn-on voltage “Von” (∼0.65 V). For instance, a series of seven diodes was needed to pinch off leakage current under a 3.3 V operation voltage. Moreover, since there are many diodes in series, the overall on-state resistance would be very large [6]. The large on-state resistance will lead to the core circuit damage at a relatively low current level and thus a relatively low ESD robustness [6]. Another ESD protection circuit based on single-gate pHEMT clamp was proposed for D-Mode technology [6] and E-Mode technology [7] respectively. Such an ESD clamp is considered a better protection design than the Schottky diode-based clamp [4], [6], [7], but its robustness is still relatively poor (0.6-A failure current in [6] and 0.7-A failure current in [7], roughly 1 kV HBM ESD level) due to the fact that there is only one current path (via the 2DEG channel) conducting ESD current in the single-gate pHEMT, which consequently causes self-heating and current saturation mechanisms mentioned in [3]. More recently, a new dual-gate pHEMT structure pHEMT clamp was reported for both D-Mode technology [8] and E-Mode technology [9] with excellent ESD current handling ability because of its second current discharge path in addition to the 2DEG current path. Nevertheless, this novel dual-gate pHEMT ESD protection approach was only characterized at the device stand-alone level and not yet experimentally implemented and evaluated with a pHEMT RF IC. Therefore it is unclear that whether this dual-gate ESD clamp’s loading effect will hurt the to-be-protected RF IC’s performance and consequently make this dual-gate ESD clamp stay away from real application. Motivated by this, we will for the first time evaluate the dual-gate ESD clamp with a single-ended mixer in GaAs pHEMT process. (750–850 MHz “RF” down-converts to 70 MHz “IF” with 680–880 MHz “LO”) With acceptable loading effects (0.2 dB degradation in conversion loss and noise figure), the mixer with dual-gate ESD clamp protection has very attractive ESD discharge ability (failure current “It2” ∼1.22 A, ∼1.82 kV Human Body Model ESD level). This ESD protection approach can be easily extended to other RF ICs in pHEMT process (e.g. power amplifier, switches, etc.).
Section snippets
Dual-gate ESD clamp
Fig. 1a shows the cross section view of the proposed depletion-mode, dual-gate GaAs pHEMT and schematic of ESD circuit built based on such a device. The ESD clamp consists of a Trigger Diode chain and a resistor (i.e., current limiter) to control the triggering of the pHEMT. Note that several diodes (see “Pinch-OFF Diode” in the figure) are connected in series with main dual-gate D-Mode HEMT to turn it off since D-Mode HEMT is a normally “ON” device. The series “Pinch-OFF Diode” also helps in
Mixer with dual-gate ESD clamp
A simple, single-ended passive mixer with an integrated passive LO buffer amplifier was chosen for evaluating the dual-gate ESD clamp. The device relies on the varying drain to source channel conductance of a FET junction to modulate an RF signal. The simplified function block was shown in Fig. 3a. The proposed dual-gate ESD clamp was added between “LO” ∼ “GND” and “VDD” ∼ “GND”. The mixer was packaged in a 4 × 4, 16-pin package and mounted on a PCB test board. Fig. 3b shows the screenshot of the
Conclusion
A novel dual-gate D-Mode ESD clamp was developed in the pHEMT technology and its successful application in a single ended passive mixer was also presented. The protected mixer with dual-gate ESD clamp was shown to survive up to an ESD HBM event of 1.82 kV, while its RF performance was only subject to a minor degradation. These results provided valuable information for the design and development of effective ESD protection solutions for pHEMT-based integrated circuits.
Acknowledgement
The authors wish to acknowledge Dr. Jean J. Hajjar, Javier Salcedo, and Srivatsan Parthasarathy for the assistance of ESD characterization.
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