On the crack and delamination risk optimization of a Si-interposer for LED packaging

doi:10.1016/j.microrel.2014.02.018

Microelectronics Reliability

Volume 54, Issues 6–7, June–July 2014, Pages 1223-1227

https://doi.org/10.1016/j.microrel.2014.02.018 Get rights and content

Highlights

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Reliability issues of thermal copper-TSVs used for heat spreading in LED packages.
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Interface fracture mechanics is utilized within a FEM framework.
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Simulative DoE to clarifies model sensitivities to delamination and cracking risks.
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X-FEM simulations carried out helped clarifying crack propagation paths in silicon.

Abstract

3D-integration becomes more and more an important issue for advanced LED packaging solutions as it is a great challenge for the thermo-mechanical reliability to remove heat from LEDs to the environment by heat spreading or specialized cooling technologies. Thermal copper-TSVs provide an elegant solution to effectively transfer heat from LED to the heat spreading structures on the backside of a substrate. But, the use of copper-TSVs generates also novel challenges for reliability as well as also for reliability analysis and prediction, i.e. to manage multiple failure modes acting combined – interface delamination, cracking and fatigue, in particular. In this case, the thermal expansion mismatch between copper and silicon yields to risky stress situations.

To overcome cracking and delamination risks in the vicinity of thermal copper-TSVs the authors performed extensive simulative work by means of fracture mechanics approaches – an interaction integral approach within a simulative DoE and the X-FEM methodology to help clarifying crack propagation paths in silicon. The results provided a good insight into the role of model parameters for further optimizations of the intended thermal TSV-approaches in LED packaging applications.

Introduction

As a result of the ongoing progress in the development of smart lighting applications 3D-integration becomes also an important issue – advanced LED packaging solutions, in particular. To remove heat from LEDs to the environment by heat spreading or specialized cooling technologies is a great challenge for the thermo-mechanical reliability in this context. Thermal copper-TSVs provide an elegant solution to effectively transfer heat from LED to the heat spreading structures on the backside of a substrate. But, the use of copper-TSVs generates also novel challenges for reliability as well as for reliability analysis and prediction, i.e. to manage multiple failure modes acting combined – interface delamination, cracking and fatigue. In this case, the huge thermal expansion mismatch between copper and silicon yields to risky stress situations. Furthermore, out of plane pumping and protrusion of copper is a challenge for the metal- and dielectric layers covering the TSV during manufacturing (reflow soldering) and also during passive and active thermal cycling tests. First investigations demonstrate that these effects depend highly on the temperature dependent elastic–plastic behavior of TSV-copper and the residual stresses determined by the electro deposition chemistry as well as on the annealing conditions - see [1], [2].

Therefore, the authors developed combined simulative/experimental methodologies to overcome cracking and delamination risks in the vicinity of the thermal copper-TSVs by means of fracture mechanics approaches. Especially, an interaction integral approach is utilized within a simulative DoE and X-FEM is used to help clarifying crack propagation paths in silicon. The DoE-based response surface methodology provided a good insight into the role of model parameters for further optimizations of the intended thermal TSV-approaches in LED packaging applications. The FE-model of the LED package under investigation is shown in Fig. 1.

Material properties as well as residual stresses taken into account for these simulations base on results of similar investigations regarding Cu-TSVs for microprocessor-memory 3D-integration explained in [1], [4]. In this context a FIB trench technique combined with digital image correlation was used to capture the residual stress state near the surface of the TSVs. EBSD (Electron Back Scattering Diffraction) had been realized at cross sections of several TSVs just to make the structural changes in TSV-copper more clear. Last but not least, nano Indentation and a bi-material thermal testing approach helped to capture the temperature dependent mechanical properties of the TSV-copper utilized – see [5].

Section snippets

Delamination risk near TSV

Different concepts of assembly and geometry approaches combined with different materials and boundary conditions were investigated in a design of experiments (DoE). It turned out that an increasing number of small copper-TSVs decreases the temperature-differences by about 0.8 K.

Apart from thermal management point of view thermo-mechanical issues have to be taken into account – the handling of the package in particular. For example, the thermo-mechanical loading of the silicon-carrier during the

Delamination risk sensitivity to geometry

The peak values of K₁ and K₂ are later on investigated via RSM (Response Surface Method) within a DoE exercise to clarify the sensitivity against changes of the TSV diameter, chip thickness and several layer thickness values, the thickness of the Nickel layer, in particular – see Fig. 2. Full factorial DoE-schemes with 3–5 points are utilized to build response surfaces/curves.

It can be seen that the SIFs of the upper interface delamination are widely independent of the thickness of the Nickel

Crack initiation and propagation in silicon

It is widely discussed in the literature that copper-TSV causes pumping and protrusion perpendicular to the upper and lower surface as a result of the CTE mismatch between copper and silicon. But, at the same time the expanding or shrinking copper causes pressure or tension in the surrounding silicon. Since this is also the case at room temperature (because of the residual stresses) measurements by means of Raman spectroscopy show increased stress levels close to the TSVs – see also [11].

On the

Conclusions

Thermal copper-TSVs as an important component of 3D-integration provide an elegant solution to effectively transfer heat from LED to the heat spreading structures on the backside of a substrate or die. But, the use of copper-TSVs generates also novel challenges for reliability analysis and prediction, i.e. to manage multiple failure modes – interface delamination, cracking and fatigue, in particular. Therefore, the authors show results of simulative work to overcome cracking and delamination

Acknowledgments

The authors gratefully acknowledge the Enlight project (http://www.enlight-project.eu/), funded by ENIAC and the German Federal Ministry of Education and Research, for the financial support.

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On the crack and delamination risk optimization of a Si-interposer for LED packaging

Highlights

Abstract

Introduction

Section snippets

Delamination risk near TSV

Delamination risk sensitivity to geometry

Crack initiation and propagation in silicon

Conclusions

Acknowledgments

Comp Meth Appl Mech Eng

Nonlinear thermal stress/strain analyses of copper filled TSV (through silicon via) and their flip-chip micro bumps

IEEE Trans Adv packaging

Impact of the electrode-position chemistry used for TSV filling on the microstructural and thermo-mechanical response of Cu

J Mater Sci