RTN distribution comparison for bulk, FDSOI and FinFETs devices
Introduction
In the context of downscaling, Statistical Variability (SV) had become a major concern in respect of device matching and its impact on circuits performances [1], [2]. Indeed discreteness of charge and matter and intrinsic lithography limitations lead to a significant dispersion of device performance and therefore to a strong need of proper approaches to predict the dispersion in devices parameters [1], [3]. This has led to the introduction of device architectures, such as Fully Depleted Silicon on Insulator (FDSOI) and Fin Field Effect Transistor (FET) devices, which tolerate low channel doping and therefore reduce the SV. Nevertheless the devices scaling has changed also the expression of reliability problems; discrete charge trapping and detrapping as well as traps interaction with SV has transformed oxide reliability into a time dependent variability [4]. However traps properties, determining traps characteristic times, are also widely distributed [5]. This raises the legitimate question whether device to device SV or traps properties dispersion dominates the dispersion of time dependent reliability impact.
In this paper we focus on Random Telegraph Noise (RTN) dispersion for bulk, FDSOI and FinFET MOSFETs. After studying the electrostatic impact of a single charged trap, we follow the methodology presented in [6], to analyse RTN noise density spectra, initially without neither SV nor traps properties dispersion and then with both of them separately and in combination.
Section snippets
Methodology
We use a sample of 100 devices for each architecture designed to meet the requirements of the 20/16/14 nm CMOS technology. The planar devices are 22 nm wide; FDSOI features a 6 nm deep Silicon layer on a 10 nm buried oxide box, whereas the FinFET buried oxide is 20 nm deep and its aspect ratio is 25 nm high for 10 nm wide. Every architectures Equivalent Oxide thickness is 0.9 nm. Those SV suffering devices are illustrated in Fig. 1. In this work we account for Random Dopants Fluctuations (RDF), Metal
Results
Fig. 2 presents single trap impact on current at threshold voltage as a function of its position along the channel. Whereas in the uniform devices case they clearly follow the source to drain potential barrier, in presence of SV these impacts are widely dispersed for bulk transistors suffering from their source to drain percolative behaviour. On the contrary dopant free channel devices robustness toward SV is demonstrated. Multi-traps impact distributions are exhaustively analysed in [7]; note
Conclusion
In this paper we have investigated different MOSFETs architectures robustness towards RTN, considering not only traps interactions with SV but also traps properties dispersion impact on noise spectrum density distributions. Even if it is of paramount importance to take SV into account to evaluate trap impact on current, we demonstrated in this work that SV is not the main source of RTN spectral power density dispersion. Indeed the characteristic RTN times dispersion is mainly related to the
Acknowledgment
The authors would like to thank Amanda Smith for her constant help in arranging conferences accommodations.
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