Breakdown behaviour of high-voltage GaN-HEMTs
Introduction
GaN-HEMTs can realize high-power-density operation with low power loss in RF and power electronic systems due to high carrier mobility in two-dimensional electron gas (2DEG) and high breakdown voltage due to large critical electric field [1]. Recent demonstrations show that GaN-HEMTs can attain ultra-low on-resistance lower than the Si-limit and mass-production of 600 V-class JEDEC qualified devices has been started [2].
In power electronics applications, switching devices operate under high applied voltage. Therefore the breakdown voltage of the switching device is chosen with a margin concerning the applied voltage to ensure the stable operation. Since the breakdown behaviour of GaN-HEMTs is complex because there are many leakage paths and no avalanche withstanding capability, the present GaN-HEMT products have been designed with large breakdown voltage margin [2]. Although the breakdown characteristics have been studied using the bias stress test and the device simulation in the previous works [3], [4], the breakdown voltage design for highly reliable operation has yet to be clarified.
In this report, a breakdown mechanism based on the experimental I–V characteristics is proposed and the breakdown characteristics' parameters are shown by referring to the device simulation results. The key points concerning device design to ensure high reliability are discussed.
Section snippets
Device fabrication and experimental results
600 V-class GaN-HEMTs were fabricated using heterostructures grown by MOCVD on a Si-substrate as shown in Fig. 1. The device processing consisted of conventional HEMT fabrication steps [5]. A MIS gate structure with 20 nm-thick SiN gate insulator film was employed to reduce the gate leakage current. SiN and SiO2 were employed as passivation films and deposited by CVD. The gate-drain offset length was 14 μm, the gate length was 1.3 μm, the gate width was 3 mm and the active device area was 0.067 mm2.
Breakdown characteristic simulation
The breakdown mechanism was analysed using the device simulation. In particular, we focused on the increase of the source current brought about by the substrate current. The two-dimensional device simulator Sentaurus Device of Synopsys was used. The drift-diffusion model was employed for the high-voltage I–V characteristics. The physical models are described below. The 2DEG density induced by the piezo and spontaneous polarizations was generated by the fixed charge. The sheet density was
Breakdown characteristic design
Based on the above-mentioned breakdown mechanism, a highly reliable design is discussed in the following. Since the trigger of the breakdown is the impact ionization, the impact ionization coefficient of the electric field Cava should be large to suppress the hole generation as shown in Fig. 6. The Cava would depend on the crystal quality and so the crystal growth condition should be optimized.
The hole remove structure as shown in Fig. 11 was proposed to suppress the hole accumulation beneath
Conclusions
The breakdown behaviour of high-voltage GaN-HEMT was analysed using the experimental I–V characteristics and two-dimensional device simulation results. The holes are generated by the impact ionization under high applied voltage. A part of the generated holes accumulates beneath the gate and lowers the gate potential barrier. As a result, the source leakage current flowing over the gate potential is increased rapidly and the breakdown finally occurs. Therefore, the impact ionization and the hole
Acknowledgements
The authors wish to thank N. Miyashita, S. Yano, M. Takashita, T. Sugiyama, Y. Saito, S. Tsuboi and T. Suto for their supports and fruitful discussion of this work.
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