Electromagnetic susceptibility characterization of double SOI device

doi:10.1016/j.microrel.2016.07.121

Microelectronics Reliability

Volume 64, September 2016, Pages 168-171

https://doi.org/10.1016/j.microrel.2016.07.121 Get rights and content

Highlights

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Double silicon on insulator technology was introduced to enhance circuit radiation tolerance.
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The shift of electrical parameters can be compensated by applying a negative voltage to the DSOI middle layer after radiation.
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Negative bias applied on middle layer can lead to decrease circuit immunity to substrate electromagnetic interference.
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Substrate electromagnetic immunity needs to be increased and a tradeoff of radiation tolerance and electromagnetic susceptibility should be considered during circuit design.

Abstract

Under a research project of monolithic pixel detectors, a double silicon on insulator (DSOI) structure was introduced based on fully depleted SOI (FDSOI) technology. It not merely integrates the sensor and readout circuit on the same processed wafer, but also increases radiation tolerance. Electromagnetic susceptibility (EMS) is also an important reliability issue in pixel detectors. The readout circuit should avoid false signal generation due to coupled noise from the substrate. This paper evaluates the performance of DSOI devices regarding total ionizing dose (TID) effect compensation in transistors by applying a negative bias to the middle silicon layer, and evaluates the electromagnetic susceptibility of the substrate by a ring oscillator. The experiment results show that the DSOI device is able to compensate for TID, and the threshold voltage and leakage current are recoverable. However, the reduction of TID effect on the DSOI device is at the expense of increasing susceptibility to electromagnetic interference (EMI) on the substrate.

Introduction

Pixel detectors are now extensively used in particle tracking experiments, X-ray imaging, and medical applications. In radiation environments, total ionizing dose (TID) damage to transistors is a large threat to circuit lifetime. In this context, a novel structure of double silicon on insulator (DSOI) based on fully depleted SOI (FDSOI) technology was introduced [1]. It integrates the sensor and readout circuit on the same processed wafer. The DSOI wafer has an additional silicon layer (middle silicon), which has an advantage of increasing device radiation tolerance to TID. [2]

Meanwhile, the pixel detector has on the order of 10³ ~ 10⁴ channels. The sensor part and readout circuit are integrated in the same wafer. Electromagnetic Compatibility (EMC) [3] is an important issue to pixel detector reliability. A dark spot would appear when adjacent channels track particles. Previous studies have clarified that the problem is caused by cross-talk between the substrate where the sensor layer is located and in-pixel circuits in the top silicon layer. [4] The middle layer of DSOI works as an electrical shield between the substrate and the top silicon layer circuits. However, the limitations of the frequency and noise amplitude of shielding are not fully studied.

This paper is structured as follows: the next Section 2 covers details of devices under test (DUTs); Section 3 shows the compensation of TID effects on DSOI devices; Section 4 describes the EMC test bench and evaluates the substrate immunity of the DSOI test circuit; Finally, Section 5 gives the discussion and conclusion.

Section snippets

Devices under test

The devices under test in this work are composed of a single NMOS and a 101 stage ring oscillator (ROS), and fabricated based on a single poly and 5 metal basic CMOS 0.2 μm FD-SOI process.

They are manufactured with a special DSOI handle wafer with two buried oxide (BOX) layers. (See Fig. 1.) Each of the devices has a 40 nm top silicon layer and two BOX layers (BOX1 = BOX2 = 140 nm). A second Si layer (SOI2) is located in the middle of the two buried oxides and it has an individual electrode.

In this

Devices under test and test setup

DUTs were packaged. They were measured with a B1500 semiconductor parameter analyzer at room temperature. The radiation test made use of ⁶⁰Co gamma rays at a dose rate of 50 rad(Si)/s with four doses: 10, 100, 300, and 500 krad(Si). During a TID test, the threshold voltage will shift in the negative direction for both NMOS and PMOS, so that while the NMOS channel opens more easily, the PMOS becomes more difficult to be made conducting and its leakage current decreases with increasing TID. In this

Experiment test setup

Substrate noise has a great influence on circuit performance. In this work, we study the influence of substrate noise with direct power injection (DPI) measurements which are according to IEC standard 62132-4 [5]. The test bench for DPI measurements as shown in Fig. 4 includes the DUT board, DPI signal generation, test control, and monitoring. Sinusoidal noise with different frequencies and amplitudes can be injected into the ring oscillator's substrate via a bias-T, and the output signal of

Conclusion and discussion

The aim of this paper is to evaluate the characterization of electromagnetic susceptibility of DSOI devices dedicated to monolithic pixel detectors used for radiation applications.

A DSOI device is able to compensate for TID effects by applying a negative bias. It can affect the holes generated in the BOX1 layer during the TID, making them move towards the BOX1/SOI2 interface, rather than be trapped in the buried oxide. And the internal electrical field generated from the trapped holes is

Acknowledgements

Thanks to Prof. Yasuo Arai from KEK and Prof. Zhongli Liu from CAS, for their assistance and support during the research work presented in this paper. This research is supported by the National Natural Science Foundation of China (61404169).

References (8)

M.I. AHMED
“New Pixel Detectors in SOI Technology for Particle Physics Applications” Thesis, AGH U
(2015)
S. HONDA
Total ionization damage effects in double silicon-on-insulator devices
IEEE Nucl. Sci. Symp.
(2013)
S.B. DHIA
«Electromagnetic Compatibility of Integrated Circuits – Techniques for Low Emission and Susceptibility»
(2006)
S. OHMURA
Investigation of the Kyoto's X-ray Astronomical SOIPIXs with Double-SOI Wafer for Reduction of Cross-Talks
(June, 2015)

There are more references available in the full text version of this article.

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Electromagnetic susceptibility characterization of double SOI device

Highlights

Abstract

Introduction

Section snippets

Devices under test

Devices under test and test setup

Experiment test setup

Conclusion and discussion

Acknowledgements

“New Pixel Detectors in SOI Technology for Particle Physics Applications” Thesis, AGH U

Total ionization damage effects in double silicon-on-insulator devices

IEEE Nucl. Sci. Symp.

«Electromagnetic Compatibility of Integrated Circuits – Techniques for Low Emission and Susceptibility»

Investigation of the Kyoto's X-ray Astronomical SOIPIXs with Double-SOI Wafer for Reduction of Cross-Talks