Degradation induced by TID radiation and hot-carrier stress in 130-nm short channel PDSOI NMOSFETs☆
Introduction
Silicon-on-insulator (SOI) technology has hardness advantages over bulk-silicon technology, such as latch-up effect immunity and less sensitivity to single-event upset from energetic cosmic particles, so that it has been widely used for space and military applications [1], [2]. However, due to the existence of buried oxide (BOX), the SOI devices face more challenges than bulk-silicon devices in radiation environments [3]. In scaled CMOS technologies, radiation-induced oxide traps in front gate oxide are almost negligible due to the thin and high-quality oxide layer [4]. On the other hand, the influence of shallow trench isolation (STI) on devices during radiation can be avoided through Hardness-By-Design solutions, such as guard rings, enclosed, and H-shape gate transistors [5], [6]. Nonetheless, the thick buried oxide still threatens the reliability of SOI devices in harsh radiation environments, especially for fully-depleted (FD) SOI devices and partially-depleted (PD) SOI devices with thinner Si film.
Concerning hot-carrier (HC) reliability of devices, many literatures have reported the influence of hot-carrier stress on PDSOI MOSFETs [7], [8]. For those devices operating for long time in radiation environments, besides radiation effects, hot-carrier reliability also needs to be considered. M. Silvestri et al. have studied the long term reliability of irradiated bulk-silicon devices earlier [9], [10]. They found there is coupling effect between radiation and HC stress, which depends on device geometry, oxide thickness, and irradiation bias. J. M. Rafí et al. have briefly reported the results of electrical stress on irradiated floating-body PDSOI NMOSFETs, which shows that there is no significant front channel degradation for irradiated sample as compared to unirradiated device [11]. However, combined effect of radiation-induced trapped charges in STI and BOX on HC reliability in SOI devices is complex, and the mechanism of interplay between radiation effects and hot-carrier (HC) injection in PDSOI devices is comparatively less known. As an important Hardness-By-Design solution, H-gate architecture can efficiently avoid the STI effect during radiation, which also offers a favorable mean to study the influence of radiation-induced trapped charges in STI and BOX on HC reliability respectively.
In this contribution, we focus on H-gate PDSOI I/O NMOSFETs degradation due to both radiation and HC stress, highlighting the effect of buried oxide. In order to analyze the degradation behavior of H-gate devices easily, T-gate samples were submitted to both radiation and HC stress simultaneously for comparison. After irradiation coupling effect between front-gate and back-gate transistor is observed in H-gate device under the worst radiation bias, which is due to the non-uniformly distributed positive charges in BOX. The HC stress experiments show that, although the body current of irradiated devices are smaller than that of unirradiated samples, the irradiated devices suffer from enhanced degradation. We attribute this phenomenon to that radiation lowers the barrier for hot-carrier injection.
Section snippets
Material and Methods
The SOI material of the PDSOI devices employed in this work was from SOITEC Corporation's 200 mm diameter UNIBOND wafer with a 100 nm thick top Si film and a 145 nm thick BOX. The PDSOI NMOSFETs were using the 130 nm PDSOI technology and the shallow trench isolation (STI) isolation. The devices were 24-pin DIP ceramic packaged. The gate oxide thickness of I/O device was about 6 nm and the operating voltage (VDD) was 3.3 V. Short channel devices with large width-to-length ratio (W/L = 10 μm/0.35 μm) were
TID Response
Prior to applying hot-carrier stress on devices, variation of main electrical parameters before and after irradiation are investigated. To analyze the effect of BOX on devices, T-gate samples are submitted to radiation at the same time for comparison. Fig. 2 shows the TID response of PDSOI I/O NMOSFETs (10 μm/0.35 μm) transfer characteristics for H-gate and T-gate devices. It is because H-shape gate can avoid the influence of shallow trench isolation on device during radiation, that there is no
Conclusion
The existence of buried oxide layer threatens the application of PDSOI devices in harsh radiation environment, especially for those with thinner top Si film. For short channel PDSOI I/O NMOSFETs with 100 nm thick Si film, part of body region is fully depleted after low total dose irradiation, which is incompletely full-depleted state, due to the non-uniformly distributed positive charges in the thick buried oxide. This leads to the coupling effect between front-gate and back-gate transistor,
Acknowledgment
Thanks are due to the Xinjiang Technical Institute of Physics and Chemistry, Chinese Academy of Science for the experiments' support and radiation experiment.
References (23)
Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip
Nucl. Instrum. Methods Phys. Res., Sect. A
(Jan. 2000)- et al.
Low frequency noise and hot-carrier reliability in advanced SOI MOSFETs
Solid State Electron.
(2004) - et al.
A thorough investigation of hot-carrier-induced gate oxide breakdown in partially depleted N- and P-channel SIMOX MOSFETs
Microelectron. Reliab.
(2002) - et al.
Electrical stress on irradiated thin gate oxide partially depleted SOI nMOSFETs
Microelectron. Eng.
(2007) - et al.
A review of recent MOSFET threshold voltage extraction methods
Microelectron. Reliab.
(2002) - et al.
Bias dependence of TID radiation responses of 0.13 μm partially depleted SOI NMOSFETs
Microelectron. Reliab.
(2013) - et al.
Investigating the degradation mechanisms caused by the TID effects in 130 nm PDSOI I/O NMOS
Nucl. Instrum. Methods Phys. Res., Sect. A
(2014) Hot-carrier degradation mechanisms in silicon-on-insulator MOSFETS
Microelectron. Reliab.
(1997)- et al.
Radiation effects in SOI technologies
IEEE Trans. Nucl. Sci.
(2003) - et al.
Frontiers of silicon-on-insulator
J. Appl. Phys.
(2003)
Electron and hole trapping in irradiated SIMOX, ZMR and BESOI buried oxides
IEEE Trans. Nucl. Sci.
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This work was supported by the Weapon Equipment Pre-Research Foundation of China [9140A11020114ZK34147]; and the Shanghai Municipal Natural Science Foundation [15ZR1447100].