A novel synchronization scheme for grid-connected converters by using adaptive linear optimal filter based PLL (ALOF–PLL)

Abstract

This paper proposes a novel grid synchronization scheme using a new phase-locked loop (PLL) scheme based on the adaptive linear optimal filtering (ALOF) technique. The problem formulation of the proposed ALOF is based on decomposing grid voltage signal into inner product of two vectors, namely, the vector of trigonometric functions and the vector of coefficients, corresponding to the input vector and the weight vector of the closed-loop adaptation algorithm by using least-mean-square (LMS) optimization algorithm. The coefficient of the fundamental component of the grid voltage is used as input signal for the PLL and the phase angles of the trigonometric functions are obtained from the output of the PLL recursively. The mathematical derivation of the weights updating law and the stability analysis of the ALOF–PLL are presented. Besides, the parameter selection for optimal performance is also discussed in terms of continuous domain (s-domain) analysis, discrete domain (z-domain) analysis and time domain simulations. The proposed ALOF–PLL shows the characteristic of band-pass filter at fundamental frequency and a notch filter at the harmonic frequencies. Finally, a detailed comparison with the existing single-phase and three-phase grid synchronization methods is also presented, and the proposed ALOF–PLL is found to have overwhelming advantages over the existing grid synchronization methods in terms of tracking accuracy, dynamic response and immunity to grid voltage disturbances, such as voltage sag/swell, phase-angle jump, harmonics, unbalance, random noises and frequency jump, etc. The validity and effectiveness of the ALOF–PLL is substantially confirmed by the extensive simulation results obtained from Matlab/Simulink.

Introduction

In recent decades, the proliferation of nonlinear loads causes significant power quality contamination for the electric distribution systems. For instance, high voltage direct transmission (HVDC), electric arc furnaces (EAFs), variable speed ac drives which adopts six-pulse power converters as the first power conversion stage, these devices cause a large amount of characteristic harmonics and a low power factor, which deteriorate power quality of electrical distribution systems [1]. Besides, the increasing restrictive regulations on power quality problems have stimulated the fast development of power quality mitigation equipments, which are connected to the grid to improve the energy transmission efficiency of the transmission lines and the quality of the voltage waveforms at the common coupling points (PCCs) for the customers. These devices are known as flexible AC transmission systems (FACTS), which are based on grid-connected converters and real-time digital signal processing techniques. Much work has been conducted in the past few decades on the FACTS technologies and many FACTS devices have been practically implemented for the high voltage transmission grid, such as static synchronous compensators (STATCOMs), thyristor controlled series compensators (TCSCs) and unified power flow controllers (UPFCs), etc. [2], [3], [4].

The stable and smooth operation of the FACTS equipments is highly dependent on how these power converters are synchronized with the grid [5], [6]. The need for improvements in the existing grid synchronization approaches also stems from rapid proliferation of distributed generation (DG) units in electric networks [5]. A converter-interfaced DG unit, e.g., a wind generator unit, a photovoltaic (PV) unit and a micro-turbine-generator unit, under both grid-connected and micro-grid (islanding) scenarios requires accurate converter synchronization under polluted and/or variable-frequency environment. Besides, an active power filter (APF) or power factor correction (PFC) rectifier also requires a reference signal which is properly synchronized to the grid [6]. Interfacing power electronic converters to the utility grid, particularly at medium and high voltages, necessitates proper synchronization for the purpose of operation and control of the grid-connected converters [7], [8]. The synchronization is usually carried out with respect to the phase angle of voltage (or current) signal(s) of the utility system. However, the signal(s) used for synchronization are often corrupted by harmonics, voltage sags/swells, commutation notches, noise, phase angle jump and frequency deviations [9], [10], [11]. Therefore, a desired synchronization method must detect the phase angle of the fundamental component of utility voltages as fast as possible while adequately eliminating the impacts of corrupting sources on the signal. Besides, the synchronization process should be updated not only at the signal zero-crossing, but continuously over the fundamental period of the signal [7].

In the previous literatures, the well-known signal processing methods have been used for analysis and synthesis of electrical signals [12], [13], [14], [15], [16], [17]. DFT is a widely used method for harmonic analysis, which assumes a fixed and known center (fundamental) frequency, suffers from shortcomings such as spectral leakage due to uncertainty in the frequency [12]. Attempts have been made to extend DFT to estimate the frequency of the input signal to provide a full phasor measurement [13], [14]. Wavelet transform (WT) has been developed to overcome some of these shortcomings of DFT. Unlike DFT, WT uses different window lengths for different frequency bands. This makes it more suitable than DFT in many power system applications [15]. The weighted least-squares estimation (WLSE)-based synchronization method rejects the impact of negative-sequence and accommodates variations in the frequency [16], [17]. However, this method exhibits long transient time intervals in detecting frequency changes and it is sensitive to noise and grid voltage distortions.

The phase-locked loop (PLL) is a fundamental concept used in various disciplines of electrical technology and it has become an indispensable part for the modern grid-connected converters [18], [19], [20], [21], [22], [23], [24], [25], [26], [27]. An early description of phase-locked loop (PLL) appeared in the papers by Appleon [18] in 1923 and Bellescize [19] in 1932. The advent of PLL has contributed to coherent communication systems without the Doppler shift effect. In the late 1970s, the theoretical description of PLL was well established [20], [21], [22], but PLL did not achieve widespread application until much later because of the difficulty in realization. With the rapid progress of the integrated circuits (IC’s) in the 1970s, PLLs were widely used in modern communication systems. Since then, the PLL has made much progress and has turned its earlier professional use in high-precision apparatuses into consumer’s electronic products, which facilitates the modern electronic systems in terms of improved performance and reliability. In the 1970s, researcher in the control field first paid attention to the realization of PLL for a synchronous motor speed control system [23]. Since then, phase-locked servo systems (PLS’s) were rapidly developed for ac and dc motors’ servomechanisms using analog PLL IC’s [24], [25]. In the 1980s, the rapidly developed high-performance digital IC’s and microprocessors have strongly motivated the implementation of PLS using digital technology. This has led to the development of new types of controllers with added PLL features for achieving an easy-to-use and easy-to-control feature for ac and dc servo drives [26], [27]. The principal idea of phase locking is to generate a signal whose phase angle is adaptively tracking variations of the phase angle of a given signal. The conventional strategy [28], [29] for phase locking is to estimate the difference between phase angle of the input signal and that of a generated output signal and to regulate this value to zero by means of a control loop. The block diagram of the conventional phase-locked loop is shown in Fig. 1, which consists of a phase detector (PD), a loop filter (LF) and a voltage controlled oscillator (VCO). The phase difference is estimated by the phase detector which is usually a multiplier. The output signal is generated by the voltage controlled oscillator whose control signal is provided by a loop controller or a loop filter. The concept of the PLL is very much similar to that of an adaptive notch filter (ANF). However, the PLL is fundamentally different from the ANF in the sense that it actively generates its output signal while the ANF passively extracts it from the input signal.

The modern FACTS and D-FACTS devices have ever-increasing requirements on the speed of response, performance, robustness, fault-recovery and power quality issues [30]. Hence the phase-locked-loops (PLLs) with all ac/dc converters take an important role in providing a reference phase signal synchronized to the grid, which is used as a basic carrier wave for deriving valve-firing pulses in control circuitry. The actual valve-firing instants are calculated using the PLL output as the base signal and the desired valve signal is added to this base signal [31], [32]. The dynamics introduced by the PLL therefore influence the actual firing signals thus the PLL plays an important role in the system dynamic performance although it is still insufficiently investigated. Research in Refs. [31], [32] studies the influence of PLL dynamics inside FACTS/HVDC, and Ref. [31] demonstrates that an increase in HVDC inverter PLL gains deteriorates the system stability. In Ref. [32], the phase-locked-loop (PLL) was adopted to generate switching signals for the thyristor valves for the static Var compensators (SVCs). In this kind of applications, the proportional and integral (PI) gains selected in the PLL have a significant influence on the dynamics of the SVC. If the PI gains are selected too small, the reference signals generated by the PLL would have a long response time, thus making the dynamic response of the SVC become very sluggish [32]. In [33], the zero-crossing detection (ZCD) synchronization circuits were employed for individual phase firing for the power converters of the first HVDC system. This ZCD scheme was found to be prone to instability of the whole system under harmonics and was replaced by a more robust equidistant firing pulse method, employing the voltage controlled oscillator [34]. This method has evolved to the vector-type PLL [35], the conventional three-phase PLL (CPLL) [36], the virtual three-phase PLL (VPLL) [37], the double reference frame PLL (DPLL) [38], etc. The vector-type PLL has excellent internal harmonic cancellation and fairly good transient responses but the response time has to be compromised in order to prevent unwanted harmonic propagation [35]. In Ref. [39], the lead-lag compensation was adopted to improve the transient response of the vector-type PLL, but the robustness under harmonics and frequency deviations remains unsolved.

The main challenges in PLL design for applications with grid-connected converters can be summarized as the need to perform with zero steady-state error for phase angle and for frequency variations, good dynamic performance under voltage depression, harmonics. A suitable approach to meet the above requirements is to adopt adaptive algorithms that regulate the system parameters in an adaptive manner. In Refs. [40], [41], the discrete robust PLL developed with power system block-set (PSB) was developed on Matlab/Simulink™ platform, which demonstrates excellent second harmonic elimination including conditions with single-phase faults and superb elimination of external ac voltage harmonics but it has unfavorable transient response and very poor phase-angle tracking under reduced grid voltages. In Ref. [42], a new PLL system that uses adaptation algorithms is developed with the aim of improving speed of responses, robustness to ac voltage depressions and harmonic rejection. However, the design of the adaptive PLL is based on intuitive approach and the strict mathematical derivation was not reported. Moreover, the adaptive PLL in Ref. [42] has a convergence time of about 50 ms, which is still insufficient for many grid-connected converter applications.

An enhanced PLL (EPLL) system is introduced in Refs. [43], [44], [45]. Application of the EPLL for online signal analysis for power system protection, control and power quality enhancement was discussed in Refs. [43], [44]. The major improvement introduced by the EPLL is in the PD mechanism, where the conventional PD mechanism is replaced by a new strategy which allows more flexibility and provides more information such as amplitude and phase angle. In Ref. [45], an alternative phase-locked loop is presented, which provides the dominant frequency component of the input signal and estimates its frequency. It is reported that this PLL provides superior performance for power system applications due to its capability of providing the phase, amplitude and frequency of the fundamental component of the input signal. However, the guidelines for parameter tuning of the presented PLL was not discussed and the transient response is sluggish [45]. In the recent literatures, the feed-forward estimation scheme [46], [47], the power PLL (p-PLL) [49], [54], park-PLL [50], [51], [54] were reported, which provides alternative grid synchronization schemes for the grid-connected converters. However, a compromise between the dynamic response and disturbance rejection must be achieved when designing the low pass filters (LPFs) for these algorithms. In [52], [53], a new PLL system employing a third-order linear and time-invariant observation model was presented, which simplified the computational complexity by using a Steady-State Linear Kalman Filter (SSLKF). However, the performance of the SSLKF-PLL under severe line disturbances, such as line voltage sag/swell, frequency jump and harmonics was not reported. To overcome the aforementioned unfavorable performance of the conventional grid synchronization schemes, this paper proposes a new phase-locked loop algorithm based on the adaptive linear optimal filtering (ALOF) technique. The excellent performance of the proposed ALOF–PLL is verified by extensive simulation results and further validated by a detailed comparison with the conventional single-phase and three-phase grid synchronization schemes. The proposed ALOF–PLL is found to have overwhelming advantages in terms of fast dynamic response, high accuracy in phase tracking and enhanced robustness under various grid voltage disturbances.

The organization of this paper is outlined as follows. The state-of-the-art techniques for grid synchronization are reviewed in Section 2, including the popular single-phase and three-phase grid synchronization algorithms. The most popular single-phase grid synchronization approaches, namely, the feed-forward estimation scheme [46], [47], the power PLL [49], [54], the enhanced PLL [43], [44], [45], virtual three-phase PLL (VPLL) [37] and the park-PLL [50], [51], [54] are reviewed in Section 2.1. And the popular three-phase grid synchronization schemes, namely, the conventional three-phase PLL (CPLL) [36] and the double reference frame PLL (DPLL) [38], [48] are reviewed in Section 2.2 in order to provide a comprehensive comparison among these schemes. In Section 3, the mathematical derivation of the proposed adaptive linear-optimal-filter PLL (ALOF–PLL) is presented, which is based on the principle of orthogonality [55], [56] by recursively searching the optimal point of the quadratic cost function, corresponding to the optimal solution in the sense of least mean square (LMS) [17]. Hence the PLL parameters are updated in an adaptive manner [40], [41], [42], [43], [44], [45], similar to the adaptive linear neural network (ADALINE) scheme reported in [6]. In Section 4, the Matlab/Simulink implementations for the existing single-phase and three-phase synchronization schemes are reported and the detailed comparison among the existing synchronization schemes and the proposed ALOF–PLL are presented under various line disturbances, such as voltage sag/swell, phase angle jump, voltage harmonics, single-phase and two-phase to ground fault, random noise as well as a sudden frequency jump, for the sake of comparison with the proposed ALOF–PLL scheme. Finally, Section 5 concludes this paper.