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A Flexible 200 GOPS HDTV Motion Estimation Chip

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Abstract

A flexible block matching motion estimation chip is described. The block size can be adaptively refined for variable size block matching algorithms with blocks of 8 × 8, 16 × 16 and 32 × 32 pixels or can be set to one of these sizes without significant loss in efficiency. The chip performs block matching on a search area of ±15 vertically and horizontally for a block size of 32 × 32 pixel. For larger search areas of, e.g., ±128 horizontally and ±32 vertically identical devices can be cascaded. Full search can be processed as well as other fast search strategies with an additional external RAM and a standard RISC processor. Sub-pel precision motion vectors can be derived using a smaller search area or cascading identical devices. The chip performes more than 200 GOPS on a die size of 220 mm2 in a 0.5-μm CMOS technology. With an additional masking unit the processor is prepared for future object or region-based algorithms.

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Authors and Affiliations

  1. Chair of Electrical Engineering and Computer Systems, University of Technology RWTH, Aachen, Germany

    Jan Peter Berns & Tobias G. Noll

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  1. Jan Peter Berns
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  2. Tobias G. Noll
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Berns, J.P., Noll, T.G. A Flexible 200 GOPS HDTV Motion Estimation Chip. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 19, 85–95 (1998). https://doi.org/10.1023/A:1008053532525

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  • DOI: https://doi.org/10.1023/A:1008053532525

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