Abstract
Program transformations are a powerful way of optimizing given applications for lower power and higher performance. In this paper, we explore avenues for power reduction by program transformations using the real-time constraints. In the sequel, we discuss the effects of our methodology, for optimization of power, on cache related performance aspects. Our target applications are in the real-time multimedia applications domain implemented on programmable multimedia or DSP processors. The effectiveness of our approach in obtaining a low power implementation and real-time performance is illustrated on three real-life applications, viz. a MPEG-2 decoder, a QSDPCM video codec and a Voicecoder application. Our experimental results indeed show that we are able to obtain lower power and still achieve a real-time performance.
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Kulkarni, C., Moolenaar, D., Nachtergaele, L. et al. System-Level Energy-Delay Exploration for Multimedia Applications on Embedded Cores with Hardware Cache. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 22, 45–57 (1999). https://doi.org/10.1023/A:1008121818984
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DOI: https://doi.org/10.1023/A:1008121818984