Abstract
Prompt detection of even small delay faults, sometimes before causing critical paths to fail, gains importance since stricter test quality requirements for high performance and high density VLSI circuits have to be satisfied in critical applications. This can be achieved by using concurrent delay testing.
In this paper a novel idea for concurrent detection of two-rail path delay faults is introduced. It is shown that TSC two-rail code error indicators that monitor pairs of paths with similar propagation delays can be used for concurrent delay testing. Our technique is applied to TSC two-rail code checkers as well as to duplication systems which are the most widely used TSC systems. The design of TSC two-rail code checkers and TSC duplication systems with respect to two-rail path delay faults is achieved for first time in the open literature.
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Paschalis, A., Gizopoulos, D. & Gaitanis, N. Concurrent Delay Testing in Totally Self-Checking Systems. Journal of Electronic Testing 12, 55–61 (1998). https://doi.org/10.1023/A:1008213304310
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DOI: https://doi.org/10.1023/A:1008213304310