Abstract
Verification and test issues raise the need for rapid prototyping of complex systems and especially hardware/software-systems. We tackle this problem by integration of hardware/software-codesign and prototyping. First we define the concept of the entire system architecture. This concept directs the hardware/software-partitioning process. Our prototyping environment reflects the architecture concept as well. In this overview the architecture concept and all important design tasks (hardware/software-partitioning, speed-up estimation before HW-synthesis, and prototyping of the entire hardware/software-system) are presented and compared to several approaches from literature. Thus a substantial overview over the prototyping problem is given. The latter part of this presentation illustrates our approach by a case study and presents the results. Our automated design process generates a tightly coupled hardware/software-system with very good performance characteristics. The case study focus on the prototyping of a ciphering algorithm. The reported approach leads to a reasonable overall system speed-up of 10 percent. Similar results have been found for further examples as well.
Similar content being viewed by others
References
E. Barros and W. Rosenstiel. A method for hardware software partitioning. In Proc. of the CompEuro, Den Haag, pp. 580–585, May 1992.
E. Barros, W. Rosenstiel, and X. Xiong. A method for partitioning UNITY language in hardware and software. In Proc. of the European Design Automation Conference, Grenoble, France, pp. 220–225, IEEE, September 1994.
Benchmarks for the 6th International Workshop on High-Level Synthesis. Available through electronic mail at ics.uci.edu, November 2–4 199. Proc. of the 6th International Workshop on High-Level Synthesis.
Th. Benner, R. Ernst, I. Könenkamp, P. Schüler, and H.-C. Schaub. A Prototyping System for Verification and Evaluation in Hardware-Software Cosynthesis. In Sixth IEEE International Workshop on Rapid System Prototyping, pp. 54–59, June 1995.
J. P. Brage and J. Madsen. A codesign case study in computer graphics. In Third International Workshop on Hardware/Software Codesign, pp. 132–139, IFIP_CODESaddr_94, IEEE Computer Society Press, September 1994.
J. L. Jr. Brown. Zeckendorf's theorem and some applications. In The Fibonacci Quaterly 2 (1964).
J. L. Jr. Brown et al. Field Programmable Gate Arrays. Kluwer Academic Publishers, 1992.
D. Bursky. Alterable RISC core fines tunes ASIC architecture. Electronic Design 41(3), 92–94 (1993).
R. Camposano and J. Wilberg. Embedded system design. Design Automation for Embedded Systems 1(1), 5–50 (1995).
Cypress Semiconductor Ross Technology Subsidiary, 3901 North First Street, San Jose, CA 95134. Sparc: RISC User's guide, 1990.
J. G. D'Ambrosio and X. S. Hu. Configuration-level hardware/software partitioning for real-time embedded systems. In IFIP_CODES_94, IFIP_CODESaddr_94, 1994.
G. De Micheli, D. C. Ku, F. Mailhot, and T. Troung. The OLYMPUS synthesis system. IEEE Transactions on Design & Test, pp. 37–53. IEEE, 1990.
EDIF/EIAL Library od Parameterized Modules, 1993.
M. D. Edwards and J. Forrest. Hardware/software partitioning for performance enhancement. In IEE Colloquium on Partitioning in Hardware-Software Codesigns, London, Great Britain, pp. 2.1–2.2.5, IEE, 1995.
H.-J. Eikerling, R. Genevriere, W. Hardt, A. Hoffmann, K. Feske, G. Franke, M. Koegst, and H.-G. Martin. Flexible HW Synthesis and Optimization by Incremental Design Modification. Technical Report SFB-358-B-1/94, University of Paderborn, Technical University of Dresden, 1994.
Heinz-Josef Eikerling and Wolfram Hardt, PMOSS: Paderborner Modular System for Synthesis and HW/SW-Codesign. University of Paderborn, Warburger Straße 100, 33098 Paderborn, 1995.
R. Ernst and J. Henkel. Hardware-software co-design of embedded controllers based on hardware extraction. In Proc. of the 2nd ACM Workshop on Hardware/Software Codesign, October 1992.
P. Filipponi. A note on the representtion of integers as a sum of distinct Fibonacci numbers. In The Fibonacci Quaterly 24 (1986).
P. Filipponi and E. Montolivo. Application of Fibinacci Numbers. Kluwer Academic Publishers, Boston/Dordrecht/London, 1990, pp. 89–99.
R. Geneviere and A. Hoffmann. PMOSS—A Modular Synthesis and HW/SW-Codesign System. Technical Report No. SFB-358-B2-2/94, University of Paderborn, Technical University of Dresden, 1994.
R. Genevriere and R. Camposano. Partitioning and Restructuring Designs on the Behavioral Level. Technical Report No. SFB-358-B2-11/94, University of Paderborn, Technical University of Dresden, 1994.
G. Goossens, F. Catthoor, D. Lanneer, and H. De Man. Integration of Signal Processing Systems on Heterogeneous IC Architectures. In Proc. of the 6th International Workshop on High-Level Synthesis, Laguna Niguel, CA, pp. 16–27, ACM/IEEE, November 2–4 1992.
K. R. Gupta and G. De Micheli. Synthesis and simulation of digital systems containing interacting hardware and software components. In Proc. of the 29th Design Automation Conference. ACM/IEEE, 1992.
W. Hardt. An automated approach to HW/SW-codesign. In IEE Colloquium: Partitioning in Hardware-Software Codesigns, London, Great Britain, February 13, 1995. Also available as technical report No. SFB 358-B2-2/95 at TU Dresden.
W. Hardt and R. Camposano. Kriterien zur Hardware/Software-Partitionierung beim Systementwurf. In Workshop des Sonderforschungsbereiches 358 der TU Dresden und der ITG/GI, Dresden, September 30, October 1 1993. Also available as technical report SFB 358-B2-2/93 at TU Dresden.
W. Hardt and R. Camposano. Trade-Offs in HW/SW-Codesign. In Proc. of the 3rd ACM Workshop on Hardware/Software Codesign, Cambridge, MA, October 7–8 1993. Also available as Technical Report No. SFB 358-B2-3/93 at TU Dresden.
W. Hardt and R. Camposano. Specification Analysis for HW/SW Partitioning. Technical Report No. SFB-358-B2-5/94, University of Paderborn, Technical University of Dresden, 1994.
W. Hardt and R. Camposano. Specification analysis for hw/sw-partitioning. In W. Grass and M. Mutz, (eds.), 3, GI/ITG Workshop: Anwendung formaler Methoden für den Hardware-Entwurf, pages 1–10, Passau, March 1995. Shaker-Verlag, Aachen. Also available as technical report SFB 358-B2-3/95 at TU Dresden.
W. Hardt, A. Günther, and R. Camposano. Pipelined Interface for HW/SW Codesign. Technical Report No. SFB-358-B2-3/94, University of Paderborn, Technical University of Dresden, 1994.
J. Henkel, Th. Benner, R. Ernst, W. Ye, N. Serafimov, and G. Glawe, “COSYMA: A software-oriented approach to hardware/software codesign. In The Journal of Computer and Software Engineering 2(3), 293–314 (1994).
J. L. Hennessy and D. A. Pattersopn. Computer Architecture: A Quantititive Approach. Morgan Kaufmann Publishers, San Mateo, CA, 1990.
Quickturn Systems Inc., Emulation System User's Guide, release 4.4 edition, 1993.
A. Kalavade and E. Lee. A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem. In IFIP_CODES_94, IFIP_CODESaddr_94, September 1994.
G. Koch, U. Kebschull, and W. Rosenstiel, “Debugging of behavioral VHDL specifications by source level emulation,” In EuroDAC, EuroDACaddr_95, ACM/IEEE, September 1995.
B. W. Lindgren, Statistical Theory. Macmillian Publishing Inc., 1962.
R. M. Stallman, Using and Porting GNU CC. Free Software Foundation Inc., December 1992.
Synopsys, Inc., Mountain View, CA. VHDL Design Analyzer (tm) Manual, 3.0 edition, 1992.
Stefan Tamme. Rapid prototyping for DSP circuits using high level desing tools. In Proc. of the European Design Automation Conference, Grenoble, France, IEEE Computer Society Press, September 1994.
F. Vahid and D. Gajski. Specification partitioning for system design. Proc. of the 29th Design Automation Conference. ACM/IEEE, 1992.
F. Vahid and D. Gajski. Closeness metrics for system-level functional partitioning. In EuroDAC, Grenoble, France, September 1994.
F. Vahid, J. Gong, and D Gajski. A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning. In Proc. of the European Design Automation Conference, Grenoble, France, pp. 214–219, September 1994.
R. A. Walker and R. Camposano, editors. A Survey of High-Level Synthesis Systems. Kluwer Academic Publishers, Boston/Dordrecht/London, 1991.
U. Weinmann, O. Bringmann, and W. Rosenstiel. Device selection for system partitioning. In Proc. of the European Design Automation Conference, Brighton, Great Britain, IEEE, September 1995.
M. Wendling and W. Rosenstiel, “A hardware environment for prototyping and partitioning based on multiple FPGAs. In Proc. of the European Design Automation Conference, Grenoble, France, pp. 77–82, IEEE, September 1994.
J. Wilberg, R. Camposano, and W. Rosenstiel. Design flow for hardware/software cosynthesis of a video compression system. In Third International Workshop on Hardware/Software Codesign, pp. 73–80. IEEE Computer Society Press, September 1994.
Wayne Wolf, Andrew Wolfe, S. Chinatti, R. Kahy, G. Slater, and S. Sun. Tigerswitch: A case study in embedded computing system design. In Third International Workshop on Hardware/Software Codesign, Grenoble, pp. 89–96, IEEE Computer Society Press, Sept 1994.
Xilinx Corporation. Xilinx Programmable Gate Array Data Book. 1994.
Zycad Corporation, Inc., USA. Concept Silicon Software (tm) Manual, 6.0 edition. 1994.
Author information
Authors and Affiliations
Rights and permissions
About this article
Cite this article
Hardt, W., Rosenstiel, W. Prototyping of Tightly Coupled Hardware/Software-Systems. Design Automation for Embedded Systems 2, 283–317 (1997). https://doi.org/10.1023/A:1008887603213
Issue Date:
DOI: https://doi.org/10.1023/A:1008887603213