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Hardware-Software Prototyping from LOTOS

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Abstract

In this paper we present an extension to the co-design approach based on LOTOS presented in Fourth International Workshop on Hardware-Software Co-Design, 1996. In this new version we add a prototyping stage to our design flow, that allows to validate the design at the implementation level. We present the complete approach, stressing the prototyping stage after partitioning. An example of an Ethernet bridge serves us to illustrate our approach and present some results.

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References

  1. E. Barros, W. Rosenstiel, and X. Xiong, “Hardware/software partitioning with UNITY,” 2nd International Workshop on Hardware-Software Co-Design, Cambridge, MA, October 1993.

  2. J. Bergé, O. Levia, and J. Rouillard, eds., High-Level System Modeling: Specification Languages. Current Issues in Electronic Modeling, Vol. 3, Kluwer Academic Publishers, September 1995.

  3. C. Carreras, J.C. López, M.L. López, C. Delgado-Kloos, N. Martínez, and L. Sánchez, “A co-design methodology based on formal specification and high-level estimation,” 4th International Workshop on Hardware-Software Co-Design, Pittsburgh, IEEE Computer Society Press, March 1996.

    Google Scholar 

  4. M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli, “Hardware-software codesign of embedded systems,” IEEE Micro, 14(4): 26–36, August 1994.

    Google Scholar 

  5. R.A. Cottrell, “ASIC design using silicon 1076,” in VHDL for Simulation, Synthesis and Formal Proofs of Hardware, J. Mermet, ed., Kluwer Academic Publishers, 1992.

  6. C. Delgado Kloos, A. Marín López, T. de Miguel Moro, and T. Robles Valladares, “From LOTOS to VHDL,” in High-Level System Modeling: Specification Languages. Current Issues in Electronic Modeling, J. Bergé, O. Levia, and J. Rouillard, eds., Vol. 3, Kluwer Academic Publishers, September 1995.

  7. R. Ernst, J. Henkel, and T. Benner, “Hardware-software cosynthesis for microcontrollers,” IEEE Design & Test of Computers, pp. 64–75, December 1993.

  8. Gajski, F. Vahid, S. Narayan, and J. Gong, Specification and Design of Embedded Systems, Prentice Hall, New Jersey, 1994.

    Google Scholar 

  9. R. Gupta and G. DeMicheli, “Hardware-software cosynthesis for digital systems,” IEEE Design & Test of Computers, pp. 29–41, September 1993.

  10. Hyperstone Electronics, Hyperstone E1 32-Bit-Microprocessor User's Manual, 1990.

  11. Information Processing Systems—Open Systems Interconnection—LOTOS: A Formal Description Technique Based on the Temporal Ordering of Observational Behaviour, IS-8807, International Standards Organization, 1989.

  12. T. Ismail and A. Jerraya, “Synthesis steps and design models for co-design,” IEEE Computer, 28(2): 44–52, February 1995.

    Google Scholar 

  13. S.C. Johnson, “Hierarchical clustering schemes,” Psychometrika, 32: 241–254, September 1967.

    PubMed  Google Scholar 

  14. B.W. Kernighan and S. Lin, “An efficient heuristic procedure for partitioning graphs,” Bell Syst. Tech. J., 4(2): 291–308, 1970.

    Google Scholar 

  15. G. Koch, U. Kebschull, and W. Rosenstiel, “A prototyping architecture for hardware/software codesign in the COBRA project,” in Proceedings of 3rd international Workshop on Hardware/Software Codesign Codes/CASHE'94, Grenoble, 1994.

  16. M.L. López Vallejo et al., “Coarse grain partitioning for hardware-software co-design,” 22nd Euromicro Conference, EUROMICRO'96, Prague, September 1996.

  17. J.A. Mañas and T. de Miguel, “From LOTOS to C,” in Formal Description Techniques, I, K.J. Turner, ed., pp. 79–84, Stirling, Scotland, UK, 1989. IFIP, North-Holland. Proceedings FORTE'88, September 1988.

    Google Scholar 

  18. C. Miguel, A. Fernández, J.M. OrtuQno, and L. Vidaller, “A LOTOS based performance evaluation tool,” special issue of Computer Networks and ISDN Systems, in Tools for FDTs, 25(7): 791–813, February 1993.

    Google Scholar 

  19. J. Quemada, A. Azcorra, and S. Pavón, “Development with LOTOS,” in Using Formal Description Techniques, K.J. Turner, ed., John Wiley and Sons, Chichester, UK, 1993, pp. 345–373.

    Google Scholar 

  20. J. Quemada, S. Pavón, and A. Fernández, “State exploration by transformation with LOLA,” Workshop on Automatic Verification Methods for Finite State Systems, Grenoble, June 1989.

  21. L. Sánchez Fernández, “Contribución a la especificación de aspectos no funcionales de sistemas hardware-software,” Ph.D. Thesis, Technical University of Madrid, July 1997.

  22. L. Sánchez Fernández, N. Martínez Madrid, and C. Delgado Kloos, “Integrating non-functional aspects into LOTOS,” Current Issues in Electronic Modeling, Vol. 4, Kluwer Academic Publishers, December 1995.

  23. L. Sánchez Fernández, N. Martínez Madrid, and C. Delgado Kloos, “LOTOS-based system co-design,” Technical Report of the ESPRIT COBRA (EP 8135) project, Madrid, April 1996.

  24. K. Stølen and M. Fuchs, “A formal method for hardware/software co-design,” Technical Report, Institut für Informatik, Technische Universität München, May 1995.

    Google Scholar 

  25. K.J. Turner, ed., Using Formal Description Techniques, John Wiley and Sons, Chichester, UK, 1993.

  26. S. Vercauteren and B. Lin, “Hardware/software communication and system integration for embedded architectures,” Design Automation for Embedded Systems, 2(3/4): 359–382, May 1997.

    Google Scholar 

  27. C. Weiler, U. Kebschull, and W. Rosenstiel, “C++ base classes for specification, simulation and partitioning of a hardware/software system,” in Proceedings of VLSI'95, pp. 777–784, 1995.

  28. U. Weinmann, “FPGA partitioning under timing constraints,” Int. Workshop on Field Programmable Logic and Applications, Oxford, September 1993.

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Fernández, L.S., Koch, G., Madrid, N.M. et al. Hardware-Software Prototyping from LOTOS. Design Automation for Embedded Systems 3, 117–148 (1998). https://doi.org/10.1023/A:1008888306732

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