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Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings

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Abstract

The performance of irregular applications on modern computer systems is hurt by the wide gap between CPU and memory speeds because these applications typically under-utilize multi-level memory hierarchies, which help hide this gap. This paper investigates using data and computation reorderings to improve memory hierarchy utilization for irregular applications. We evaluate the impact of reordering on data reuse at different levels in the memory hierarchy. We focus on coordinated data and computation reordering based on space-filling curves and we introduce a new architecture-independent multi-level blocking strategy for irregular applications. For two particle codes we studied, the most effective reorderings reduced overall execution time by a factor of two and four, respectively. Preliminary experience with a scatter benchmark derived from a large unstructured mesh application showed that careful data and computation ordering reduced primary cache misses by a factor of two compared to a random ordering.

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Authors and Affiliations

  1. Department of Computer Science, MS 132, Rice University, 6100 Main, Houston, Texas, 77005

    John Mellor-Crummey & Ken Kennedy

  2. Computer Science Department, Florida State University, Tallahassee, Florida, 32306-4530

    David Whalley

Authors
  1. John Mellor-Crummey
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  2. David Whalley
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  3. Ken Kennedy
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Correspondence to John Mellor-Crummey.

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Mellor-Crummey, J., Whalley, D. & Kennedy, K. Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings. International Journal of Parallel Programming 29, 217–247 (2001). https://doi.org/10.1023/A:1011119519789

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