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Algorithms Transformation Techniques for Low-Power Wireless VLSI Systems Design

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Abstract

This paper presents an overview of algorithmtransformation techniques and discusses their role inthe development of hardware-efficient and low-power VLSIalgorithms and architectures for communication systems. Algorithm transformation techniquessuch as retiming, look-ahead and relaxed pipelining,parallel processing, folding, unfolding, and strengthreduction are described. These techniques are applied statically (i.e., during the system designphase) and hence are referred to as static algorithmtransformations (SATs). SAT techniques alter thestructural and functional properties of a givenalgorithm so as to be able to jointly optimizeperformance measures in the algorithmic (signal-to-noiseratio [SNR] and bit error rate [BER]) and VLSI (powerdissipation, area and throughput) domains. Next, a new class of algorithm transformations referred toas dynamic algorithm transformations (DAT) is presented.These transformations exploit the nonstationarity in theinput signal environment to determine and assign minimum computational requirements foran algorithm in real time. Both SAT and DAT techniquesare poised to play a critical role in the development oflow-power wireless VLSI systems given the trend toward increasing digital signal processing inthese systems.

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  1. Naresh R. Shanbhag
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Shanbhag, N.R. Algorithms Transformation Techniques for Low-Power Wireless VLSI Systems Design. International Journal of Wireless Information Networks 5, 147–171 (1998). https://doi.org/10.1023/A:1018869519651

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