Abstract
We examine the energy and performance benefits that can be obtained by re-mapping frequently executed loops from a microprocessor to reconfigurable logic. We present a design flow that finds critical software loops automatically and manually re-implements these inconfigurable logic by implementing them in SA-C, a C language variation supportinga dataflow computation model and designed to specify and map DSP applicationsonto reconfigurable logic. We apply this design flow on several examples fromthe MediaBench benchmark suite and report the energy and performance improvements.
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Villarreal, J., Suresh, D., Stitt, G. et al. Improving Software Performance with Configurable Logic. Design Automation for Embedded Systems 7, 325–339 (2002). https://doi.org/10.1023/A:1020359206122
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DOI: https://doi.org/10.1023/A:1020359206122