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Assessing the Soft Error Rate of Digital Architectures Devoted to Operate in Radiation Environment: A Case Studied

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Abstract

The effects of transient bit flips on the operation of processor based architectures is investigated through fault injection experiments performed in the hardware itself by means of the interruption mechanism. Such an approach is based on the execution, as the consequence of an interruption signal assertion, of pieces of code called CEU (Code Emulating Upsets), asynchronously downloaded in a suitable memory area. This paper focuses in the methodology followed to set-up CEU injection experiments on a digital architecture, illustrating it main steps by means of a studied case: the 80C51 microcontroller. Results obtained from automated fault injection sessions performed using the capabilities of a devoted test system, will point out the capabilities and limitations of the studied approach.

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Authors and Affiliations

  1. TIMA Laboratory, 46, Av. Félix Viallet, 38031, Grenoble, France

    R. Velazco & S. Rezgui

  2. Faculty of Engineering I, Lebanese University, Tripoli, Lebanon

    H. Ziade

Authors
  1. R. Velazco
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  2. S. Rezgui
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  3. H. Ziade
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Velazco, R., Rezgui, S. & Ziade, H. Assessing the Soft Error Rate of Digital Architectures Devoted to Operate in Radiation Environment: A Case Studied. Journal of Electronic Testing 19, 83–90 (2003). https://doi.org/10.1023/A:1021900130241

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  • DOI: https://doi.org/10.1023/A:1021900130241

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