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Modeling Fault Coverage of Random Test Patterns

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Abstract

We present a new probabilistic fault coverage model that is accurate, simple, predictive, and easily integrated with the normal design flow of built-in self-test circuits. The parameters of the model are determined by fitting the fault simulation data obtained on an initial segment of the random test. A cost-based analysis finds the point at which to stop fault simulation, determine the parameters, and estimate fault coverage for longer test lengths. Experimental results on benchmark circuits demonstrate the effectiveness of this approach in making accurate predictions at a low computational cost. As compared to the cost of fault-simulating all the test vectors, the savings in computational time for larger circuits ranged from four to fourteen times. We also present an analysis of the mean and the variance of the fault coverage achieved by a random test of a given length. This analysis and simulation results demonstrate that while the mean coverage is determined by the distribution of the detectabilities of individual faults, the dual distribution of fault coverage of individual test vectors determines the variance.

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Authors and Affiliations

  1. University of Nebraska-Lincoln, Lincoln, Nebraska, USA

    Hailong Cui & Sharad C. Seth

  2. Indian Institute of Technology, Kanpur, India

    Shashank K. Mehta

Authors
  1. Hailong Cui
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  2. Sharad C. Seth
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  3. Shashank K. Mehta
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Cui, H., Seth, S.C. & Mehta, S.K. Modeling Fault Coverage of Random Test Patterns. Journal of Electronic Testing 19, 271–284 (2003). https://doi.org/10.1023/A:1023796929359

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  • DOI: https://doi.org/10.1023/A:1023796929359

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