Skip to main content
Log in

Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks

  • Published:
Telecommunication Systems Aims and scope Submit manuscript

Abstract

In multimedia applications, the stringent requirements for balancing transmission capacity, flexible service provisioning and cost reduction lead the manufactures to provide highly integrated System-on Chip (SoC) solutions. This paper analyzes the application of high-bandwidth-networking SoCs to improve on the cost efficiency of multimedia service distribution in home networks. We present a case study, where we utilize the inherent protocol processing capabilities and high bandwidth interfaces of a modern network processor, scaled down to match the performance targets and low cost requirements of the home networking environment. An efficient, low cost Residential Gateway architecture results by mapping the home services onto the processing and memory blocks of this SoC.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. Agere: Network processors, www.agere.com.

  2. Architecture of the Residential Gateway, ISO/IEC JTC SC25 WG1 N912.

  3. C-Port, Motorola, http://e-www.motorola.com/.

  4. G. Doumenis, D. Reisis and G. Stassinopoulos, Efficient implementation of SAR sublayer and the ATM layer in high speed broadband ISDN terminal adapters, in: IEEE Internat. Conf. on Communication (ICC), Vol. 1, Geneva, Switcherland, 1993, pp. 63–67.

  5. G. Doumenis et al., A parallel VLSI video/communication controller, VLSI Signal Processing Journal (July 2000).

  6. J.L. Hennessy and D.A. Patterson, Computer Architecture: A Quantitative Approach, 2nd ed. (Morgan Kaufmann, Los Altos, 1996).

    Google Scholar 

  7. http://www.hyperstone-electronics.com.

  8. Intel Web site, http://developer.intel.com/design/network/products/ npfamily/ixp1200.htm.

  9. Next generation network processor technologies, White paper, Network Processor Division Intel Corporation (2001).

  10. N. Nikolaou et al., Application decomposition for high-speed network processing platforms, in: 2nd European Conf. on Universal Multiservice Networks (ECUMN), Colmar, France, 2000, pp. 322–329.

  11. P.G. Paulin, F. Karim and P. Bromley, Network processors: A perspective on market requirements, processor architectures and embedded S/W tools, in: Design Automation and Test Conference (DATE), 2001, pp. 420–427.

  12. S. Teger and D.J.Waks, End-user perspectives on home networking, IEEE Communications Magazine (April 2002) 114–119.

  13. I.Z. Theologitou et al., Simple and reusable test access mechanism for SoC validation, in: Internat. Workshop on Testing Embedded Core-Based System Chips (TECS), Monterey, CA, 2002.

  14. K. Thompson, G. Miller and R. Wilder, Wide-area internet traffic patterns and characteristics, IEEE Network 11(6) (1997) 10–23.

    Article  Google Scholar 

  15. VDSL customer premises equipment specification, FS-VDSL specification, Full Services-VDSL Committee, Working Group CPE (2002) part III.

  16. What is an IAD: Making sense of integrated access devices, White paper, Vina Technologies (1999).

  17. C. Ykman-Couvreur et al., System-level performance optimization of the data queueing memory management in high-speed network processors, in: Design Automation Conference, New Orleans, LA, USA, 2002, pp. 518–523.

  18. T. Zahariadis, K. Pramataris and N. Zervos, A comparison of competing broadband in-home technologies, IEE Electronics and Communications Engineering Journal 14(4) (2002) 133–142.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

About this article

Cite this article

Orphanoudakis, T., Perissakis, S., Pramataris, K. et al. Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks. Telecommunication Systems 23, 351–367 (2003). https://doi.org/10.1023/A:1024442011132

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1023/A:1024442011132

Navigation