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Reduced complexity analogue-to-residue conversion employing folding number system

Reduced complexity analogue-to-residue conversion employing folding number system

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Digital signal processing (DSP) algorithms are computationally intensive and require recursive multiplication and addition. Residue number systems (RNS) offer significant advantages over conventional number systems when used in the design of special purpose DSP architectures. However, conversion of analogue signals into their residue equivalents requires first converting the signal to binary equivalents and subsequently using modular circuits to convert the resultant binary to residues. A new number system called the folding number system (FNS) is proposed and used as the basis for residue conversion. Since FNS has one-to-one correspondence with RNS, the proposed method converts the analogue signal to its RNS equivalents using concealed symmetrical residues in FNS domain. The conversion is simple and uses analogue folding circuits, comparators and combinatorial logic circuits. High-frequency analogue signals can be efficiently converted thus enabling RNS to be implemented in high-speed signal processing architectures.

Inspec keywords: computational complexity; residue number systems; digital signal processing chips; combinational circuits; comparators (circuits)

Other keywords: analogue signal conversion; combinatorial logic circuits; modular circuits; DSP architectures; analogue folding circuits; high-speed signal processing architectures; residue number systems; folding number system; concealed symmetrical residue; comparators; digital signal processing algorithm; high-frequency analogue signals

Subjects: Logic and switching circuits; Digital signal processing; Computational complexity; Signal processing and detection; Other digital circuits

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