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Very large scale integration (VLSI) implementation of low-complexity variable block size motion estimation for H.264/AVC coding

Very large scale integration (VLSI) implementation of low-complexity variable block size motion estimation for H.264/AVC coding

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  • Author(s): S.-C. Hsia 1, 2  and  P.-Y. Hong 2
    • View affiliations
    • Affiliations: 1: Department of Electronics Engineering, National Kaohsiung First University of Science and Technology, Taiwan
      2: Department of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology, Taiwan
  • Source: Volume 4, Issue 5, September 2010, p. 414 – 424
    DOI:  10.1049/iet-cds.2009.0200 , Print ISSN 1751-858X, Online ISSN 1751-8598
© The Institution of Engineering and Technology
Published

This study presents a fast algorithm and its very large scale integration (VLSI) design to implement the variable block size motion estimation. The fast algorithm is proposed with a hardware-oriented concept for regular VLSI design. Simulations show that the proposed algorithm can reduce about 90% motion searching time, whereas PSNR only decreases about 0.02 dB on average. Based on the fast algorithm, VLSI architecture is designed with parallel structure and pipeline timing schedule to achieve high throughput rate for the HDTV system. The chip can compute 41 vectors for various block size during 24–240 cycles as using only 96 processing elements. Comparisons with contemporary VLSI architectures, this chip can offer higher processing speed, wider searching range and lower circuit complexity.

Inspec keywords: video coding; logic design; high definition television; VLSI; motion estimation; circuit complexity; pipeline processing

Other keywords: hardware-oriented concept; circuit complexity; HDTV system; VLSI design; VLSI architecture; throughput rate; motion searching time; pipeline timing schedule; H.264/AVC coding; low-complexity variable block size motion estimation; parallel structure

Subjects: Video signal processing; Parallel architecture; Logic design methods; Image and video coding; Digital circuit design, modelling and testing

References

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