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Utilising the normal distribution of the write noise margin to easily predict the SRAM write yield

Utilising the normal distribution of the write noise margin to easily predict the SRAM write yield

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This study describes a method to easily predict the write yield of a static random access memory (SRAM) memory cell. The differential coefficient of the combined word line margin (CWLM) for the threshold voltage (Vth) is analysed using the simple Schockley's transistor model. The analysis shows the good linearity comes from keeping the access transistor operating in the saturation mode for a wide range of Vth's. The Monte Carlo simulation demonstrates that the CWLM obeys the normal distribution. The mean and the variance of the CWLM are almost constant for sample numbers ranging from 100 to 100 000. The estimated write failure probability are almost uniform within a factor of 1.7 for the number of samples more than 300, which allows us to evaluate SRAM with a small number of measurements. The predicted distribution using the differential coefficient calculated by the SPICE simulation also matches the Monte Carlo results. The estimated write failure probability agrees with the Monte Carlo results within a factor of 2.0, which is acceptable for SRAM redundancy circuit design. Finally, the write yield is related to the error rate. Thus, the write yield is easily predicted from a small number of measured samples or the differential coefficients of the CWLM on the Vth's calculated by the SPICE simulation.

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