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Low-distance path-based multicast routing algorithm for network-on-chips

Low-distance path-based multicast routing algorithm for network-on-chips

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  • Author(s): M. Daneshtalab 1, 2 ; M. Ebrahimi 2, 3 ; S. Mohammadi 1 ; A. Afzali-Kusha 1
    • View affiliations
    • Affiliations: 1: Nanoelectronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran
      2: Department of Information Technology, University of Turku, Turku, Finland
      3: Science and Research Branch, Department of Computer Engineering, Islamic Azad University, Tehran, Iran
  • Source: Volume 3, Issue 5, September 2009, p. 430 – 442
    DOI:  10.1049/iet-cdt.2008.0086 , Print ISSN 1751-8601, Online ISSN 1751-861X
© The Institution of Engineering and Technology
Published

In this study, a low-distance path-based multicast routing algorithm for network-on-chips (NoCs) and multiprocessor systems-on-chip is proposed. The algorithm, which is based on the mesh topology, makes use of network partitioning, optimised destination ordering and the odd–even turn model adaptive routing technique for both the multicast and unicast messages. Additionally, the algorithm invokes non-congested paths in routing the messages to prevent creating highly congested areas. This is achieved by considering the congestion condition of the input ports. The efficiency of the proposed multicast routing algorithm is evaluated by comparing its performance with those of previously proposed algorithms under both multicast and mixed (mixture of unicast and multicast) traffic models. The results show that the proposed technique has lower average delays and lower average and peak power consumptions compared to those of the other path-based multicasting algorithm for different message injection rates. The technique has a hardware overhead of less than 8%.

Inspec keywords: network-on-chip; network routing

Other keywords: peak power consumption; multiprocessor systems-on-chip; odd-even turn model adaptive routing technique; optimised destination ordering; average delays; network partitioning; low-distance path-based multicast routing algorithm; path-based multicasting algorithm; network-on-chip

Subjects: Digital circuit design, modelling and testing; Microprocessor chips; Microprocessors and microcomputers

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