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Formalisation and verification of programmable logic controllers timers in Coq

Formalisation and verification of programmable logic controllers timers in Coq

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Programmable logic controllers (PLCs) are widely used in embedded systems. Timers play a pivotal role in PLC real-time applications. The formalisation of timers is of great importance. The study presents a formalisation of PLC timers in the theorem proving system Coq, in which the behaviours of timers are characterised by a set of axioms at an abstract level. The authors discuss how to model timers at a proper and sound abstract level. PLC programs with timers are modelled. As a case study, a quiz machine problem with a timer is investigated. This work demonstrates the complexity of formal timer modelling.

References

    1. 1)
      • Siemens: ‘S7-200 programmable controller system manual’ (Siemens, 2003).
    2. 2)
      • Bender, D.F., Combemale, B., Crégut, X., Farines, J.M., Berthomieu, B., Vernadat, F.: `Ladder metamodeling and PLC program validation through time petri nets', Proc. Fourth European Conf. on Model Driven Architecture, ECMDA-FA'08, 2008, Berlin, Heidelberg, p. 121–136.
    3. 3)
      • Mader, A., Wupper, H.: `Timed automaton models for simple programmable logic controllers', Proc. Euromicro Conf. on Real-Time Systems, 1999, p. 114–122.
    4. 4)
      • Heiner, M., Menzel, T.: `Time-related modelling of PLC systems with time-less petri nets. Discrete event systems, analysis and control', Proc. WODES 2000, 2000, p. 275–282.
    5. 5)
    6. 6)
      • IEC International Standard 1131-3: ‘Programmable controllers, part 3: programming languages’, 1993.
    7. 7)
      • Pavlovic, O., Pinger, R., Kollmann, M.: `Automated formal verificaiton of PLC programs written in IL', Fourth Int. Verification Workshop, VERIFY'07, 2007.
    8. 8)
    9. 9)
      • A. Sülflow , R. Drechsler . (2008) Verification of PLC programs using formal proof techniques.
    10. 10)
    11. 11)
      • Bauer, N.: `Übersetzung von steuerungsprogrammen in formale modelle', 1998, Master's, University of Dortmund.
    12. 12)
      • A. Mader . A classification of PLC models and applications, Fifth Workshop on Discrete Event Systems, WODES 2000, Gent, Belgium, August 2000.
    13. 13)
      • Jiménez-Fraustro, F., Rutten, E.: `A synchronous model of iec 61131 PLC languages in signal', Proc. 13th Euromicro Conf. on Real-Time Systems, ECRTS'01, 2001, Washington, DC, USA, p. 135.
    14. 14)
      • Y. Bertot , P. Castéran . (2004) Interactive theorem proving and program development Coq'Art: the calculus of inductive constructions.
    15. 15)
      • E.R. Olderog , H. Dierks . (2008) Real-time systems: formal specification and automatic verification.
    16. 16)
      • L'Her, D., Parc, P.L., Marcé, L.: `Proving sequential function chart programs using automata', Revised Papers from the Third Int. Workshop on Automata Implementation, 1999, WIA'98, London, UK, p. 149–163.
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