Dimensioning Burst Assembly Process in Optical Burst Switching Networks

JungYul CHOI
JinSeek CHOI
Minho KANG

Publication
IEICE TRANSACTIONS on Communications   Vol.E88-B    No.10    pp.3855-3863
Publication Date: 2005/10/01
Online ISSN: 
DOI: 10.1093/ietcom/e88-b.10.3855
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Next Generation Photonic Network Technologies)
Category: 
Keyword: 
burst assembly parameter,  control packet process,  optical burst switching,  timer,  threshold,  

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Summary: 
Suitably aggregated data burst enhances link utilization and reduces data processing complexity of optical transport networks rather than just transmitting each bursty input traffic from access networks. This data burst generation method is called as a burst assembly process and has two assembly parameters, timer and threshold, for regulating burst release time and burst size. Since the traffic characteristics of data burst generated at the burst assembler may affect network performance, the decision of burst assembly parameters should be carefully designed. Thus, in this paper we study the dimensioning burst assembly process to find the burst assembly parameter values satisfying target performance. For this purpose, we first analyze timer-based and threshold-based burst assembly processes, respectively. As constraints on the dimensioning burst assembly process, we consider the following performance metrics: 1) processing delay of control packet, 2) burst loss at control plane, and 3) link utilization. Based on these constraints, a decision mechanism of the burst assembly parameters is proposed. From numerical analysis, we suggest a possible lower boundary value for the burst assembly parameters satisfying the target burst loss rate and delay time at the control plane.