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Spread-Spectrum Clock Generator for Serial ATA with Multi-Bit ΣΔ Modulator-Controlled Fractional PLL Masaru KOKUBO Takashi KAWAMOTO Takashi OSHIMA Takayuki NOTO Masato SUZUKI Shigeyuki SUZUKI Takashi HAYASAKA Tomoaki TAKAHASHI Jun KASAI Publication IEICE TRANSACTIONS on Electronics Vol.E89-C No.11 pp.1682-1688 Publication Date: 2006/11/01 Online ISSN: 1745-1353 DOI: 10.1093/ietele/e89-c.11.1682 Print ISSN: 0916-8516 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: PLL, spread-spectrum, jitter, serial ATA, Full Text: PDF(769KB)>>
Summary: We have developed a spread-spectrum Phase-Locked Loop (PLL) for serial Advanced Technology Attachment (ATA) applications. We investigated the relation between the output jitter of PLLs in serial ATA applications and ΣΔ modulators in PLLs. On the basis of this study, we developed a spread-spectrum PLL for serial ATA applications and achieved a combination of small jitter and large electromagnetic interference (EMI) peak power reduction. This was achieved using two key components: multi-bit ΣΔ-controlled PLL and voltage-controlled oscillation with cross-coupled load delay cells. Using a 0.15-µm complementary metal-oxide semiconductor process, we fabricated a complete serial ATA transceiver featuring a spread-spectrum clock generator (SSCG). We achieved a spread-spectrum PLL with 10-dB EMI reduction and 8.1 ps random jitter for use in serial ATA applications. All other measured results for SSCG performance were very good and showed that the spread-spectrum generator more than satisfies serial ATA specifications. | |||||
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