Design and Verification of On-Chip Impedance-Matching Circuit Using Transmission-Line Theory for 2.4 GHz-Band Wireless Receiver Front-End

Haruichi KANAYA
Ramesh K. POKHAREL
Fuminori KOGA
Keiji YOSHIDA

Publication
IEICE TRANSACTIONS on Electronics   Vol.E89-C    No.12    pp.1888-1895
Publication Date: 2006/12/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e89-c.12.1888
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Emerging Microwave Techniques)
Category: Passive Circuits/Components
Keyword: 
CPW line,  impedance-matching circuit,  2.4 GHz-band wireless LAN,  λ/4 resonator,  transmission-line theory,  

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Summary: 
Recently, spiral inductors have widely been used instead of resistors in the design of matching circuits to enhance the thermal noise performance of a wireless transceiver. However, such elements usually have low quality factor (Q) and may encounter the self-resonance in microwave-frequency band which permits its use in higher frequencies, and on the other hand, they occupy the large on-chip space. This paper presents a new design theory for the impedance-matching circuits for a single-chip SiGe BiCMOS receiver front-end for 2.4 GHz-band wireless LAN (IEEE 802.11b). The presented matching circuits are composed of conductor-backed coplanar waveguide (CPW) meander-line resonators and impedance (K) inverter. The prototype front-end receiver is designed, fabricated and tested. A few of the measured results to verify the design theory are presented.