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HTS Sampler with Improved Circuit Design and Layout Michitaka MARUYAMA Hironori WAKANA Tsunehiro HATO Hideo SUZUKI Keiichi TANABE Koichiro UEKUSA Takeshi KONNO Nobuya SATO Masayuki KAWABATA Publication IEICE TRANSACTIONS on Electronics Vol.E90-C No.3 pp.579-587 Publication Date: 2007/03/01 Online ISSN: 1745-1353 DOI: 10.1093/ietele/e90-c.3.579 Print ISSN: 0916-8516 Type of Manuscript: Special Section INVITED PAPER (Special Section on Innovative Superconducting Devices and Their Applications) Category: Keyword: HTS sampler, SFQ pulse, wideband measurement, Full Text: PDF(1.2MB)>>
Summary: This paper reviews our progress on the high-Tc superconducting (HTS) sampler development, covering from the circuit design to the latest experimental data in the sinusoidal and pulse waveform measurements. A computer simulation has revealed that our sampler circuit with an improved design enables waveform measurement with the bandwidth over 100 GHz even with the thermal noise at around 40 K. Using the HTS sampler circuits fabricated employing an improved layout, we demonstrated waveform measurements for sinusoidal signals with frequencies of up to 50 GHz, the upper limit of the signal generator we used, both in the voltage-input-type system with a high-frequency input line and in the current-input-type one with a superconducting pickup coil. In the pulse measurement using an on-chip sampler, we succeeded in observing pico-second-order-wide single flux quantum (SFQ) current pulses, suggesting the potential bandwidth of our HTS sampler of more than 125 GHz. | |||||
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