A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI

Yasue YAMAMOTO
Masanori SHIRAHAMA
Toshiaki KAWASAKI
Ryuji NISHIHARA
Shinichi SUMI
Yasuhiro AGATA
Hirohito KIKUKAWA
Hiroyuki YAMAUCHI

Publication
IEICE TRANSACTIONS on Electronics   Vol.E90-C    No.5    pp.1129-1137
Publication Date: 2007/05/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e90-c.5.1129
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Semiconductor Materials and Devices
Keyword: 
non-volatile memory,  single poly gate,  differential cell,  CMOS logic process,  System-on-Chip (SoC),  

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Summary: 
A novel PND (PMOS-NMOS-Depletion MOS) technology for a single poly gate non-volatile memory cell design has been reported for the first time. This technology features memory cell design with a differential cell architecture which enables to provide the higher performance for the key specifications such as programming time, erasing time, and endurance characteristics. This memory cell consists of 3-Transistors, PMOS, NMOS, and Depletion MOS transistors (hereafter PND). The DMOS in this cell is used for the tunneling device in the erasing operation, while the NMOS and the PMOS are used for the tunneling device and the coupling capacitor in the programming operation, respectively. The proposed PND design can allow lower applied voltage of the erase-gate (EG) and control-gate (CG) in the erasing and the programming operations so that the endurance characteristics can be improved because the DMOS suppresses the potential of floating-gate (FG) and hence the effective potential difference between the EG and the FG can be increased in the erasing operation. Based on the measured data, it can be expected that the erasing speed of the PND cell can be 125-fold faster than that of our previously reported work (PN type). Therefore, high performance and high reliability CMOS non-volatile memory without any additional process can be realized using this proposed PND technology.