Regular Section
Power and Skew Aware Point Diffusion Clock Network
2008 Volume E91.C Issue 11 Pages 1832-1834
Details
2008 Volume E91.C Issue 11 Pages 1832-1834
This letter presents point diffusion clock network (PDCN) with local clock tree synthesis (CTS) scheme. The clock network is implemented with ten times wider metal line space than typical mesh networks for low power and utilized to nine times smaller area CTS execution for minimized clock skew amount. The measurement results show that skew amount of PDCN with local CTS is reduced to 36% and latency is shrunk to 45% of the amount in a 4.81mm2 CortexA-8 core with 65nm Samsung process.
