Publication IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer SciencesVol.E89-ANo.7pp.2003-2008 Publication Date: 2006/07/01 Online ISSN: 1745-1337 DOI: 10.1093/ietfec/e89-a.7.2003 Print ISSN: 0916-8508 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: analog-to-digital converter, pipeline, amplifier sharing,
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Summary: From the viewpoint of a low-power pipeline ADC design, a comparison between two conventional power reduction techniques is discussed. The comparison shows that the amplifier sharing technique has an advantage in terms of the power reduction effect. To confirm the advantage, a test chip of 10-bit 80-MSPS ADC using the amplifier sharing technique is fabricated. The test chip dissipates 55 mW at 80 MSPS (Mega Sample Per Second).