1.2V, 24mW/ch, 10bit, 80MSample/s Pipelined A/D Converters

Takeshi UENO; Tomohiko ITO; Daisuke KUROSE; Takafumi YAMAJI; Tetsuro ITAKURA

doi:10.1093/ietfec/e91-a.2.454

Special Section on Analog Circuit Techniques and Related Topics

1.2V, 24mW/ch, 10bit, 80MSample/s Pipelined A/D Converters

Takeshi UENO, Tomohiko ITO, Daisuke KUROSE, Takafumi YAMAJI, Tetsuro ITAKURA

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Keywords: pipelined A/D converter, amplifier sharing, common-source, common-mode feedforward

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2008 Volume E91.A Issue 2 Pages 454-460

DOI https://doi.org/10.1093/ietfec/e91-a.2.454

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Abstract

This paper describes 10-bit, 80-MSample/s pipelined A/D converters for wireless-communication terminals. To reduce power consumption, we employed the I/Q amplifier sharing technique [1] in which an amplifier is used for both I and Q channels. In addition, common-source, pseudo-differential (PD) amplifiers are used in all the conversion stages for further power reduction. Common-mode disturbances are removed by the proposed common-mode feedforward (CMFF) technique without using fully differential (FD) amplifiers. The converter was implemented in a 90-nm CMOS technology, and it consumes only 24mW/ch from a 1.2V power supply. The measured SNR and SNDR are 58.6dB and 52.2dB, respectively.

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